Characterizes a reproducible post-GPU cache-displacement window on M4 Pro and quantifies a one-pass CPU recovery mechanism via Metal experiments and PMU data.
In: ACSAC ’21: Annual Computer Security Appli- cations Conference, Virtual Event, USA, December 6-10, 2021
2 Pith papers cite this work. Polarity classification is still indexing.
2
Pith papers citing it
years
2026 2verdicts
UNVERDICTED 2representative citing papers
MIPSBLEED uncovers timing leaks in L1 data cache, L1 instruction cache, and execution engine of SMT-enabled MIPS processors and demonstrates a single-trace key recovery attack on elliptic curve cryptography.
citing papers explorer
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Residual GPU Cache State on Apple M4 Pro
Characterizes a reproducible post-GPU cache-displacement window on M4 Pro and quantifies a one-pass CPU recovery mechanism via Metal experiments and PMU data.
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MIPSBLEED: Uncovering Microarchitectural Timing Leaks in Pervasive Embedded Processors
MIPSBLEED uncovers timing leaks in L1 data cache, L1 instruction cache, and execution engine of SMT-enabled MIPS processors and demonstrates a single-trace key recovery attack on elliptic curve cryptography.