A parameter-extraction framework predicts ReRAM IMC performance across array sizes and resolutions to maximize energy efficiency under power and error limits without exhaustive simulations.
Characterization and Modeling of Multilevel Analog ReRAM Synapses in the Sky130 Process
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Design Space Exploration for ReRAM-based Architectures to Address Scaling Non-idealities
A parameter-extraction framework predicts ReRAM IMC performance across array sizes and resolutions to maximize energy efficiency under power and error limits without exhaustive simulations.