A joint optimization framework for multi-die floorplanning and technology assignment that uses ML-based PPA estimation to optimize area, wirelength, performance, power, and cost, outperforming greedy baselines in 2.5D and 3D ICs.
OpenPiton: An Open Source Manycore Research Framework,
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Duet is a manycore-eFPGA architecture with cache-coherent integration that supports fine-grained acceleration and hardware augmentation, shown in RTL evaluation to cut communication latency by up to 82% and deliver 1.5-24.9x speedups on seven benchmarks.
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Simultaneous Multi-die Floorplanning and Technology Assignment
A joint optimization framework for multi-die floorplanning and technology assignment that uses ML-based PPA estimation to optimize area, wirelength, performance, power, and cost, outperforming greedy baselines in 2.5D and 3D ICs.
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Duet: Creating Harmony between Processors and Embedded FPGAs
Duet is a manycore-eFPGA architecture with cache-coherent integration that supports fine-grained acceleration and hardware augmentation, shown in RTL evaluation to cut communication latency by up to 82% and deliver 1.5-24.9x speedups on seven benchmarks.