Syn@fac optimization reduces estimated circuit failure probability by a factor of 9 on average across non-Clifford benchmarks for bivariate bicycle code modular FTQC architectures, with additional gains from transvection deferral and Clifford insertion.
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A programmable 2D toric oscillator network enables efficient routing for bivariate bicycle LDPC codes, reducing long-range couplers to O(sqrt(n)) and achieving 3.06% logical error rate per cycle in simulations for the [[18,4,4]] code.
Introduces a gauging-based method for fault-tolerant logical measurement achieving qubit overhead linear in operator weight up to polylog factors, adaptable to arbitrary codes.
citing papers explorer
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Assessing System Capabilities and Bottlenecks of an Early Fault-Tolerant Bicycle Architecture
Syn@fac optimization reduces estimated circuit failure probability by a factor of 9 on average across non-Clifford benchmarks for bivariate bicycle code modular FTQC architectures, with additional gains from transvection deferral and Clifford insertion.
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Efficient Routing of Quantum LDPC Codes on Programmable 2D Toric Architectures
A programmable 2D toric oscillator network enables efficient routing for bivariate bicycle LDPC codes, reducing long-range couplers to O(sqrt(n)) and achieving 3.06% logical error rate per cycle in simulations for the [[18,4,4]] code.
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Low-overhead fault-tolerant quantum computation by gauging logical operators
Introduces a gauging-based method for fault-tolerant logical measurement achieving qubit overhead linear in operator weight up to polylog factors, adaptable to arbitrary codes.