A dual-precision hybrid FP MAC PE using bit-partitioning to run FP8 or two FP4 operations on shared 4-bit hardware, claiming 60% area and 87% power savings in 28nm.
A 28-nm 8-bit floating- point tensor core-based programmable CNN training processor with dynamic structured sparsity,
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DHFP-PE: Dual-Precision Hybrid Floating Point Processing Element for AI Acceleration
A dual-precision hybrid FP MAC PE using bit-partitioning to run FP8 or two FP4 operations on shared 4-bit hardware, claiming 60% area and 87% power savings in 28nm.