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State preparation with parallel-sequential circuits

2 Pith papers cite this work. Polarity classification is still indexing.

2 Pith papers citing it
abstract

We introduce parallel-sequential (PS) circuits, a family of quantum circuit layouts that interpolate between brickwall and sequential circuits, which introduces control parameters governing a trade-off between the amount of entanglement and the maximum correlation range they can express. We provide numerical evidence that PS circuits can efficiently prepare many-body ground states in one dimension. On noisy devices, characterized through both idling errors and two-qubit gate errors, we show that in a wide parameter regime, PS circuits outperform brickwall, sequential, and the log-depth circuits from [Malz, Styliaris, Wei, Cirac, PRL 132, 040404 (2024)]. Additionally, we demonstrate that properly chosen noisy random PS circuits suppress error proliferation and, when employed as a variational ansatz, exhibit superior trainability.

fields

quant-ph 2

years

2025 2

verdicts

UNVERDICTED 2

representative citing papers

State preparation with parallel-sequential circuits

quant-ph · 2025-03-18 · unverdicted · novelty 7.0

Parallel-sequential circuits provide a tunable family of quantum circuit layouts that numerically outperform brickwall, sequential, and log-depth circuits for 1D ground-state preparation under realistic noise models.

citing papers explorer

Showing 2 of 2 citing papers.

  • Preparation Circuits for Matrix Product States by Classical Variational Disentanglement quant-ph · 2025-04-30 · unverdicted · none · ref 13 · internal anchor

    A layer-by-layer classical variational disentanglement algorithm compiles preparation circuits for matrix product states by minimizing bipartite entanglement to reduce bond dimensions.

  • State preparation with parallel-sequential circuits quant-ph · 2025-03-18 · unverdicted · none · ref 56 · internal anchor

    Parallel-sequential circuits provide a tunable family of quantum circuit layouts that numerically outperform brickwall, sequential, and log-depth circuits for 1D ground-state preparation under realistic noise models.