HAVEN combines LLM agents for planning and gap analysis with protocol-specific templates and a custom DSL to generate correct UVM testbenches, achieving 100% compilation success, 90.6% code coverage, and 87.9% functional coverage on 19 open-source designs across three protocols.
Llm4eda: Emerging progress in large language models for electronic design automation
6 Pith papers cite this work. Polarity classification is still indexing.
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UNVERDICTED 6representative citing papers
ATLAAS automatically converts RTL-extracted bit-level accelerator semantics into tensor-level ISA specs via an 8-pass MLIR pipeline, enabling automated compiler backend generation for designs like Gemmini and VTA.
AnalogRetriever maps schematics, descriptions, and netlists of analog circuits into one embedding space and achieves 75.2% average Recall@1 across six retrieval directions while boosting an agentic design framework.
Prerequisite graphs map compressed LLM performance boundaries in analog circuit analysis to allow selecting the smallest viable model for a given task complexity.
Structured reflection makes error diagnosis and repair an explicit trainable step that improves reliability and reduces redundant calls in tool-using LLM agents.
ORFS-agent uses LLM agents to tune parameters in chip design flows, improving geometric-mean wirelength, clock period, and co-optimization objectives by up to 2.7% over OR-AutoTuner with 40% fewer iterations on ASAP7 and SKY130HD benchmarks.
citing papers explorer
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HAVEN: Hybrid Automated Verification ENgine for UVM Testbench Synthesis with LLMs
HAVEN combines LLM agents for planning and gap analysis with protocol-specific templates and a custom DSL to generate correct UVM testbenches, achieving 100% compilation success, 90.6% code coverage, and 87.9% functional coverage on 19 open-source designs across three protocols.
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ATLAAS: Automatic Tensor-Level Abstraction of Accelerator Semantics
ATLAAS automatically converts RTL-extracted bit-level accelerator semantics into tensor-level ISA specs via an 8-pass MLIR pipeline, enabling automated compiler backend generation for designs like Gemmini and VTA.
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AnalogRetriever: Learning Cross-Modal Representations for Analog Circuit Retrieval
AnalogRetriever maps schematics, descriptions, and netlists of analog circuits into one embedding space and achieves 75.2% average Recall@1 across six retrieval directions while boosting an agentic design framework.
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Complexity Horizons of Compressed Models in Analog Circuit Analysis
Prerequisite graphs map compressed LLM performance boundaries in analog circuit analysis to allow selecting the smallest viable model for a given task complexity.
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Failure Makes the Agent Stronger: Enhancing Accuracy through Structured Reflection for Reliable Tool Interactions
Structured reflection makes error diagnosis and repair an explicit trainable step that improves reliability and reduces redundant calls in tool-using LLM agents.
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ORFS-agent: Tool-Using Agents for Chip Design Optimization
ORFS-agent uses LLM agents to tune parameters in chip design flows, improving geometric-mean wirelength, clock period, and co-optimization objectives by up to 2.7% over OR-AutoTuner with 40% fewer iterations on ASAP7 and SKY130HD benchmarks.