The first FPGA-based hardware architecture for the Contrast Maximization algorithm in event-based vision achieves over 200x faster motion parameter estimation with high energy efficiency.
In: Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition
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FPGA-Based Hardware Architecture for Contrast Maximization in Event-Based Vision
The first FPGA-based hardware architecture for the Contrast Maximization algorithm in event-based vision achieves over 200x faster motion parameter estimation with high energy efficiency.