Barbell codes are a family of qLDPC codes with a matching superconducting chip layout enabling constant hardware complexity, simulated to preserve logical information over trillions of QEC cycles at 10^{-4} physical noise with under 30 data qubits per logical qubit.
Modular superconducting-qubit architecture with a multichip tunable coupler
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Heterogeneous quantum architectures with task-specific hardware and QEC encodings deliver up to 138x lower physical-qubit overhead than monolithic baselines for fault-tolerant algorithms, including RSA-2048 factoring at 190k-381k qubits.
A review summarizing superconducting qubit types, DiVincenzo criteria implementations, coherence limits from defects, and large-scale integration strategies for quantum computing.
citing papers explorer
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Heterogeneous architectures enable a 138x reduction in physical qubit requirements for fault-tolerant quantum computing under detailed accounting
Heterogeneous quantum architectures with task-specific hardware and QEC encodings deliver up to 138x lower physical-qubit overhead than monolithic baselines for fault-tolerant algorithms, including RSA-2048 factoring at 190k-381k qubits.
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Review of Superconducting Qubit Devices and Their Large-Scale Integration
A review summarizing superconducting qubit types, DiVincenzo criteria implementations, coherence limits from defects, and large-scale integration strategies for quantum computing.