The authors integrate a parameterized posit FPU into a SHAKTI RISC-V core, claim the first posit-enabled RISC-V processor, and report accuracy benefits over IEEE-754 in selected applications.
Open-source variable-precision floating-point library for major commercial fpgas,
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PERI: A Posit Enabled RISC-V Core
The authors integrate a parameterized posit FPU into a SHAKTI RISC-V core, claim the first posit-enabled RISC-V processor, and report accuracy benefits over IEEE-754 in selected applications.