Generalized ping-pong staggers PIM macro write/compute operations to fully use off-chip bandwidth, outperforming naive ping-pong by 1.22x to 7.71x in simulation.
A 12nm linux-smp-capable risc-v soc with 14 accelerator types, distributed hardware power management, and flexible noc-based data orchestration,
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Generalized Ping-Pong: Off-Chip Memory Bandwidth Centric Pipelining Strategy for Processing-In-Memory Accelerators
Generalized ping-pong staggers PIM macro write/compute operations to fully use off-chip bandwidth, outperforming naive ping-pong by 1.22x to 7.71x in simulation.