Models clock jitter in ADCs as AR(1) and introduces weighted least-squares and Kalman-filter dejittering algorithms that deliver 1-15 dB SINADR gains in simulations.
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Models cross-correlated clock jitter in ADC arrays as a VAR(1) process and compensates it via pilot-tone Kalman smoother, with simulations showing reduced distortion.
citing papers explorer
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Autoregressive Stochastic Clock Jitter Compensation in Analog-to-Digital Converters
Models clock jitter in ADCs as AR(1) and introduces weighted least-squares and Kalman-filter dejittering algorithms that deliver 1-15 dB SINADR gains in simulations.
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Compensation of correlated autoregressive clock jitter in arrays of Analog-to-Digital Converters
Models cross-correlated clock jitter in ADC arrays as a VAR(1) process and compensates it via pilot-tone Kalman smoother, with simulations showing reduced distortion.