pith. sign in

arxiv: 2511.23351 · v1 · pith:3AEB2CP6new · submitted 2025-11-28 · 📡 eess.SP

Compensation of correlated autoregressive clock jitter in arrays of Analog-to-Digital Converters

Daniele Gerosa , Lauri Anttila , Thomas Eriksson This is my paper

Pith reviewed 2026-05-21 17:48 UTC · model grok-4.3

classification 📡 eess.SP
keywords ADC jitter compensationvector autoregressive processKalman smootherpilot toneMIMO ADCsclock timing errorssignal processing
0
0 comments X

The pith

Modeling jitter in ADC arrays as a coupled vector autoregressive process enables a Kalman smoother to track and compensate correlated timing errors using pilot tones.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper establishes that sampling clock jitter in arrays of analog-to-digital converters exhibits temporal and cross-channel correlations that can be captured by a vector autoregressive model of order one. By treating the jitter as this coupled process, a Kalman smoother driven by a pilot tone can jointly estimate the timing deviations across channels. This compensation approach leads to substantial reductions in the distortion caused by jitter in communication systems. A sympathetic reader would care because traditional independent noise models leave jitter untrackable, whereas this method exploits the actual structure to improve fidelity.

Core claim

This paper addresses the joint tracking and compensation of random, cross-correlated timing errors in ADC arrays by modeling jitter as a coupled vector autoregressive process of order one (VAR(1)). We propose a pilot-tone-based Kalman smoother to track and compensate the jitter, and simulations demonstrate substantial reductions in jitter-induced distortion across diverse scenarios.

What carries the argument

Coupled vector autoregressive process of order one (VAR(1)) for jitter, combined with a pilot-tone-based Kalman smoother for tracking and compensation.

If this is right

  • The method jointly tracks timing errors across multiple ADC channels.
  • Substantial reductions in jitter-induced distortion are achieved in simulations for various scenarios.
  • The approach handles both temporal correlations and spatial cross-correlations in MIMO ADC arrays.
  • Compensation is possible without assuming independent Gaussian noise for jitter.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • Extending the model to higher-order processes could capture more complex jitter dynamics if VAR(1) proves limiting.
  • This compensation technique might integrate into existing digital signal processing pipelines for high-speed sampling systems.
  • Real-world deployment could benefit from adaptive estimation of the VAR parameters from data.

Load-bearing premise

Real ADC jitter can be adequately modeled as a coupled vector autoregressive process of order one.

What would settle it

Comparing the actual measured autocorrelation and cross-correlation functions of jitter in physical ADC hardware against those predicted by a VAR(1) process; significant mismatch would indicate the model is inadequate.

Figures

Figures reproduced from arXiv: 2511.23351 by Daniele Gerosa, Lauri Anttila, Thomas Eriksson.

Figure 1
Figure 1. Figure 1: Schematic representation of the system model under [PITH_FULL_IMAGE:figures/full_fig_p002_1.png] view at source ↗
Figure 2
Figure 2. Figure 2: Schematic representation of a Time-interleaved Analog [PITH_FULL_IMAGE:figures/full_fig_p002_2.png] view at source ↗
Figure 3
Figure 3. Figure 3: Low jitter, high noise. The leftmost power percentage [PITH_FULL_IMAGE:figures/full_fig_p005_3.png] view at source ↗
Figure 5
Figure 5. Figure 5: MIMO vs SISO tracking. V. CONCLUSIONS In this paper we addressed de-jittering of MIMO ADC arrays by modeling receiver timing errors as a cross-correlated VAR(1) process, ξn = Vξn−1 +ϵn, which captures spectrally colored spectra. We proposed a pilot-tone aided Kalman smoother to estimate bξn from zn ≈ p(tn) + Dp(tn)ξn + H(wn) and a payload de-jittering scheme. We showed that, in noise-limited conditions, SJ… view at source ↗
read the original abstract

In modern communication systems, the fidelity of analog-to-digital converters (ADCs) is limited by sampling clock jitter, i.e., small random timing deviations that undermine ideal sampling. Traditional scalar models often treat jitter as independent Gaussian noise, which makes it essentially untrackable, whereas real ADCs also exhibit temporally correlated (spectrally colored) imperfections. Moreover, spatial cross-correlations between channels in multiple-input multiple-output (MIMO) ADCs are commonly neglected. This paper addresses the joint tracking and compensation of random, cross-correlated timing errors in ADC arrays by modeling jitter as a coupled vector autoregressive process of order one (VAR(1)). We propose a pilot-tone-based Kalman smoother to track and compensate the jitter, and simulations demonstrate substantial reductions in jitter-induced distortion across diverse scenarios.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

2 major / 1 minor

Summary. The paper proposes modeling the clock jitter in ADC arrays as a coupled vector autoregressive process of order one (VAR(1)) to enable joint tracking and compensation using a pilot-tone-based Kalman smoother. Simulations are claimed to demonstrate substantial reductions in jitter-induced distortion in various scenarios.

Significance. If the VAR(1) model accurately captures the jitter statistics in real ADCs and the simulation results hold up under scrutiny, this could represent a meaningful advance in compensating timing errors in multi-antenna or MIMO systems, potentially leading to better overall system performance in high-speed communications.

major comments (2)
  1. [Abstract] The abstract mentions that simulations show substantial reductions in jitter-induced distortion but provides no quantitative results, model validation details, error analysis, or comparison baselines. This makes it difficult to evaluate the strength of the central claim.
  2. [Jitter Model] The assumption that real ADC jitter follows a first-order vector autoregressive process is load-bearing for the derivation of the Kalman smoother. Without supporting analysis showing that this model fits measured data better than alternatives, the applicability remains uncertain.
minor comments (1)
  1. Clarify the pilot tone frequency selection and its impact on the tracking performance.

Simulated Author's Rebuttal

2 responses · 0 unresolved

We appreciate the referee's detailed review and constructive feedback on our manuscript. We address the major comments below and outline the revisions we plan to make.

read point-by-point responses

  1. Referee: [Abstract] The abstract mentions that simulations show substantial reductions in jitter-induced distortion but provides no quantitative results, model validation details, error analysis, or comparison baselines. This makes it difficult to evaluate the strength of the central claim.

    Authors: We agree with this observation. The current abstract is indeed qualitative. In the revised version, we will include specific quantitative results, such as the percentage reduction in distortion and comparisons to uncompensated cases or other methods, to better support the central claims. revision: yes

  2. Referee: [Jitter Model] The assumption that real ADC jitter follows a first-order vector autoregressive process is load-bearing for the derivation of the Kalman smoother. Without supporting analysis showing that this model fits measured data better than alternatives, the applicability remains uncertain.

    Authors: The VAR(1) model is selected because it effectively captures both temporal correlations and cross-channel correlations in a computationally efficient manner suitable for Kalman smoothing. While we do not have access to proprietary measured jitter data from specific ADC hardware in this work, we will add a section discussing the model's motivation based on prior studies of clock jitter spectra and include an analysis of the impact of model mismatch in simulations. revision: partial

Circularity Check

0 steps flagged

No circularity: modeling proposal with independent simulation validation

full rationale

The paper selects a VAR(1) model for cross-correlated jitter and derives a pilot-tone Kalman smoother from that model, then reports simulation results. No load-bearing equation reduces a claimed prediction or result to a fitted input or self-citation by construction. The derivation chain is self-contained against the chosen model and external simulation benchmarks; the modeling assumption is a correctness risk rather than a circularity issue. This is the normal honest outcome for a modeling-plus-simulation paper.

Axiom & Free-Parameter Ledger

0 free parameters · 0 axioms · 0 invented entities

No free parameters, axioms, or invented entities are specified in the abstract. The VAR(1) model itself may embed standard assumptions about stationarity and linearity, but these are not detailed.

pith-pipeline@v0.9.0 · 5664 in / 1169 out tokens · 85670 ms · 2026-05-21T17:48:54.263167+00:00 · methodology

discussion (0)

Sign in with ORCID, Apple, or X to comment. Anyone can read and Pith papers without signing in.

Lean theorems connected to this paper

Citations machine-checked in the Pith Canon. Every link opens the source theorem in the public Lean library.

What do these tags mean?
matches
The paper's claim is directly supported by a theorem in the formal canon.
supports
The theorem supports part of the paper's argument, but the paper may add assumptions or extra steps.
extends
The paper goes beyond the formal theorem; the theorem is a base layer rather than the whole result.
uses
The paper appears to rely on the theorem as machinery.
contradicts
The paper's claim conflicts with a theorem or certificate in the canon.
unclear
Pith found a possible connection, but the passage is too broad, indirect, or ambiguous to say the theorem truly supports the claim.

Reference graph

Works this paper leans on

30 extracted references · 30 canonical work pages

  1. [1]

    Araghi, M

    H. Araghi, M. A. Akhaee, and A. Amini,Joint Compensation of Jitter Noise and Time-Shift Errors in Multichannel Sampling System, IEEE Transactions on Instrumentation and Measurements, vol. 68(10), pp. 3932–3941, 2019

    work page 2019

  2. [2]

    Chang, C.-L

    Y .-S. Chang, C.-L. Lin, W.-S. Wang, C.-C. Lee and C.-Y . Shih,An Analytical Approach for Quantifying Clock Jitter Effects in Continuous- Time Sigma–Delta Modulators, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 53(9), pp. 1861–1868, 2006

    work page 2006

  3. [3]

    V . Divi,Estimation and Calibration Algorithms for Distributed Sam- pling Systems, Ph.D thesis, Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, 2008

    work page 2008

  4. [4]

    V . Divi, G. W. Wornell,Blind Calibration of Timing Skew in Time- Interleaved Analog-to-Digital Converters, IEEE Journal of Selected Topics In Signal Processing, vol. 3(3), pp. 509–522, 2009

    work page 2009

  5. [5]

    Elbornsson,Analysis, Estimation and Compensation of Mismatch Effects in A/D Converters, Ph.D thesis, Department of Electrical En- gineering, Link ¨oping University, 2003

    J. Elbornsson,Analysis, Estimation and Compensation of Mismatch Effects in A/D Converters, Ph.D thesis, Department of Electrical En- gineering, Link ¨oping University, 2003

    work page 2003

  6. [6]

    Gerosa, R

    D. Gerosa, R. Hou, V . Bj ¨ork, U. Gustavsson, and T. Eriksson,Au- toregressive Stochastic Clock Jitter Compensation in Analog-to-Digital Converters, submitted, 2025

    work page 2025

  7. [7]

    Hernandez, A

    L. Hernandez, A. Wiesbauer, S. Paton, and A. Di Giandomencio, Modelling and optimization of low pass continuous-time sigma delta modulators for clock jitter noise reduction, 2004 IEEE International Symposium on Circuits and Systems (ISCAS), pp. I–1072, 2004

    work page 2004

  8. [8]

    J. R. Higgins,Sampling Theory in Fourier and Signal Analysis - Foundations, Oxford Science Publications, 1996

    work page 1996

  9. [9]

    R. A. Horn, and C. R. Johnson,Matrix Analysis, 2nd edition, Cambridge University Press, 2013

    work page 2013

  10. [10]

    O. G. Ibarra-Manzano, J. A. Andrade-Lucio, M. A. Vazquez Olguin and Y . S. Shmaliy,Kalman Filter for Discrete Processes With Timing Jitter, IEEE Transactions on Signal Processing, vol. 73, pp. 219–229, 2025

    work page 2025

  11. [11]

    Jarlebring,Methods for Lyapunov Equations, Kungliga Tekniska H¨ogskolan (KTH) Lecture Notes, 2017

    E. Jarlebring,Methods for Lyapunov Equations, Kungliga Tekniska H¨ogskolan (KTH) Lecture Notes, 2017

    work page 2017

  12. [12]

    M. I. Kadec,The exact value of the Paley-Wiener constant, Dokl. Akad. Nauk SSSR, vol. 155, pp. 1253–1254, 1964; English transl. Sov. Math. Nauk, vol. 5, pp. 559–561, 1964

    work page 1964

  13. [13]

    Kumar, V

    S. Kumar, V . K. Goyal, and S. E. Sarma,Efficient Parametric Signal Estimation From Samples With Location Errors, IEEE Transactions on Signal Processing, vol. 61(21), pp. 5285–5297, 2013

    work page 2013

  14. [14]

    D. B. Leeson,A Simple Model of Feedback Oscillator Noise Spectrum, Proceedings of the IEEE, vol. 54(2), pp. 329–330, 1966

    work page 1966

  15. [15]

    T. H. Lee, and A. Hajimiri,Oscillator Phase Noise: A Tutorial, IEEE Journal of Solid-State Circuits, vol. 35(3), pp. 326–336, 2000

    work page 2000

  16. [16]

    L ¨utkepohl,New Introduction to Multiple Time Series Analysis, Springer, 2005

    H. L ¨utkepohl,New Introduction to Multiple Time Series Analysis, Springer, 2005

    work page 2005

  17. [17]

    Papoulis,Generalized Sampling Expansion, IEEE Transactions on Circuits and Systems, vol

    A. Papoulis,Generalized Sampling Expansion, IEEE Transactions on Circuits and Systems, vol. 24(11), pp. 652–654, 1977

    work page 1977

  18. [18]

    Piemontese, G

    A. Piemontese, G. Colavolpe, and T. Eriksson,A new analytical model of phase noise in communication systems, 2022 IEEE Wireless Com- munications and Networking Conference (WCNC)

    work page 2022

  19. [19]

    Salib, M

    A. Salib, M. F. Flanagan, and B. Cardiff,A High-Precision Time Skew Estimation and Correction Technique for Time-Interleaved ADCs, IEEE Transactions on Circuits and Systems-I: Regular Papers, vol. 66(10), pp. 3747–3760, 2019

    work page 2019

  20. [20]

    Seip, and A

    K. Seip, and A. M. Ulanovskii,Random exponential frames, Journal of the London Mathematical Society, vol. 53, pp. 560–568, 1996

    work page 1996

  21. [21]

    H. Shen, H. Zheng, D. O’Hare, D. John, and B. Cardiff,A Background Jitter Calibration for ADCs Using TDC Phase Information From AD- PLL, IEEE Access, vol. 12, pp. 174551–174563, 2024

    work page 2024

  22. [22]

    Sung, and J

    J. Sung, and J. Choi,A New Interpretation of the Time-Interleaved ADC Mismatch Problem: A Tracking-Based Hybrid Calibration Approach, to appear in IEEE Signal Processing Letters, 2025

    work page 2025

  23. [23]

    Syrj ¨al¨a, and M

    V . Syrj ¨al¨a, and M. Valkama,Sampling Jitter Cancellation in Direct- Sampling Radio, 2010 IEEE Wireless Communication and Networking Conference, Sydney, NSW, Australia, pp. 1–6, 2010

    work page 2010

  24. [24]

    Testoni, N

    N. Testoni, N. Speciale, A. Ridolfi, and C. Pouzat,Adaptive Wavelet- based signal dejittering, 2007 Ph.D Research in Microelectronics and Electronics Conference, pp. 257–260, 2007

    work page 2007

  25. [25]

    Z. J. Towfic, S.-K. Ting, and A. H. Sayed,Clock Jitter Compensation in High-Rate ADC Circuits, IEEE Transactions on Signal Processing, vol. 60(11), pp. 5738–5753, 2012

    work page 2012

  26. [26]

    K. M. Tsui, and S. C. Chan,A Novel Iterative Structure for Online Calibration of M-channel Time-Interleaved ADCs, IEEE Transactions on Instrumentation and Measurement, vol. 63(2), pp. 312–325, 2014

    work page 2014

  27. [27]

    Tulone,A resource-efficient time estimation for wireless sensor networks,, Proc

    D. Tulone,A resource-efficient time estimation for wireless sensor networks,, Proc. 2004 Joint Workshop on Foundations of Mobile Com- puting, ser. DIALM-POMC ’04. New York, NY , USA: Association for Computing Machinery, 2004, pp. 52-59

    work page 2004

  28. [28]

    D. S. Weller, and V . K. Goyal,Bayesian Post-Processing Methods for Jitter Mitigation in Sampling, IEEE Transactions On Signal Processing, vol. 59(5), pp. 2112–2123, 2011

    work page 2011

  29. [29]

    Zanchi, and C

    A. Zanchi, and C. Samori,Analysis and Characterization of the Effects of Clock Jitter in A/D Converters for Subsampling, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 55(2), pp. 522–534, 2008

    work page 2008

  30. [30]

    I. Zino, R. Dabora, and H. V . Poor,Distributed Clock Phase and Frequency Synchronization in Half-Duplex TDMA Networks,IEEE Transactions on Communications (Early Access), 2025

    work page 2025