A fabricated 64-core RISC-V cluster with complex-arithmetic and systolic extensions delivers up to 243 GFLOP/s on PUSCH baseband workloads at 49.6 GFLOP/s/W while meeting the 4ms uplink latency budget.
Intelligent O-RAN Beyond 5G: Architecture, Use Cases, Challenges, and Opportunities,
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A 410GFLOP/s, 64 RISC-V Cores, 204.8GBps Shared-Memory Cluster in 12nm FinFET with Systolic Execution Support for Efficient B5G/6G AI-Enhanced O-RAN
A fabricated 64-core RISC-V cluster with complex-arithmetic and systolic extensions delivers up to 243 GFLOP/s on PUSCH baseband workloads at 49.6 GFLOP/s/W while meeting the 4ms uplink latency budget.