Integrated complementary graphene inverter
classification
❄️ cond-mat.mes-hall
keywords
grapheneintegratedinverterdigitaldiractransistorsannealingboolean
read the original abstract
The operation of a digital logic inverter consisting of one p- and one n-type graphene transistor integrated on the same sheet of monolayer graphene is demonstrated. The type of one of the transistors was inverted by moving its Dirac point to lower gate voltages via selective electrical annealing. Boolean inversion is obtained by operating the transistors between their Dirac points. The fabricated inverter represents an important step towards the development of digital integrated circuits on graphene.
This paper has not been read by Pith yet.
discussion (0)
Sign in with ORCID, Apple, or X to comment. Anyone can read and Pith papers without signing in.