pith. sign in

arxiv: 1907.10320 · v1 · pith:4L7EWIM6new · submitted 2019-07-24 · ⚛️ physics.ins-det

Bunch-by-bunch Beam Transverse Feedback Electronics Designed for SSRF

Jinxin Liu , Lei Zhao , Linsong Zhan , Shubin Liu , Qi An This is my paper

Pith reviewed 2026-05-24 16:54 UTC · model grok-4.3

classification ⚛️ physics.ins-det
keywords transverse feedbackbunch-by-bunchsignal processorSSRFENOBfrequency responsebeam stabilitysynchrotron
0
0 comments X

The pith

The signal processor for SSRF transverse feedback meets specs with over 9.5-bit ENOB to 300 MHz and phase uncertainty below 2 degrees.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper presents the design and laboratory testing of the signal processor component in a bunch-by-bunch transverse feedback system for the SSRF storage ring. Multi-bunch instabilities increase beam emittance and energy spread, risking beam loss in the 3.5 GeV high-current synchrotron. The processor handles beam position monitor signals through analog-to-digital conversion and digital processing to generate corrective kicks. Bench tests with sinusoidal inputs confirm the ADC performance exceeds the 7.9-bit requirement and the full system frequency response aligns with simulations, delivering sufficient amplitude suppression and phase stability. These results indicate the electronics are ready to integrate into the complete feedback loop for beam stabilization.

Core claim

The signal processor in the bunch-by-bunch transverse feedback electronics for SSRF has been designed and tested, achieving an effective number of bits better than 10 at 100 MHz input and better than 9.5 up to 300 MHz, exceeding the 7.9-bit requirement, while the overall system frequency response matches simulations with amplitude suppression better than 35 dB at critical frequencies and phase uncertainty better than 2 degrees, satisfying the application requirements.

What carries the argument

The signal processor, which performs analog-to-digital conversion of beam position signals followed by digital processing to shape the feedback response.

If this is right

  • The electronics can be integrated with BPM, RF amplifiers, and transverse kickers to form a complete feedback system.
  • Multi-bunch instabilities in the storage ring can be suppressed during high-current operation.
  • Beam emittance and energy spread remain controlled, preserving beam quality.
  • The design supports stable 3.5 GeV operation without beam loss from instabilities.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • The same processor architecture could be evaluated for other third-generation light sources with similar bunch spacing and instability modes.
  • Extending bench tests to include modulated or pulsed inputs mimicking actual BPM signals would strengthen validation before ring installation.
  • The achieved phase stability opens the possibility of combining this processor with faster digital filters in future upgrades.

Load-bearing premise

Laboratory bench tests using sinusoidal input signals up to 300 MHz accurately represent the actual beam position monitor signals, noise environment, and timing conditions inside the SSRF storage ring during operation.

What would settle it

Direct operation of the full feedback system on multi-bunch beams in the SSRF ring, measuring whether instabilities are reduced compared to open-loop conditions.

Figures

Figures reproduced from arXiv: 1907.10320 by Jinxin Liu, Lei Zhao, Linsong Zhan, Qi An, Shubin Liu.

Figure 1
Figure 1. Figure 1: The overview over the transverse feedback system. [PITH_FULL_IMAGE:figures/full_fig_p001_1.png] view at source ↗
Figure 3
Figure 3. Figure 3: Block diagram of the clock generation and delay adjustment circuits. [PITH_FULL_IMAGE:figures/full_fig_p002_3.png] view at source ↗
Figure 4
Figure 4. Figure 4: Block diagram of the digital signal processing algorithm. [PITH_FULL_IMAGE:figures/full_fig_p003_4.png] view at source ↗
Figure 5
Figure 5. Figure 5: Block diagram of the deserialization [PITH_FULL_IMAGE:figures/full_fig_p003_5.png] view at source ↗
Figure 10
Figure 10. Figure 10: shows the photo of the feedback electronics [PITH_FULL_IMAGE:figures/full_fig_p004_10.png] view at source ↗
Figure 11
Figure 11. Figure 11: shows the system under test in the laboratory. The electronics is designed as a standard PXI-6U module. The feedback electronics can be controlled by a remote PC through Ethernet via the Single Board Computer (SBC) in Slot 0 of the PCI crate [PITH_FULL_IMAGE:figures/full_fig_p004_11.png] view at source ↗
Figure 12
Figure 12. Figure 12: Typical frequency spectrums of the ADC output. [PITH_FULL_IMAGE:figures/full_fig_p005_12.png] view at source ↗
Figure 15
Figure 15. Figure 15: Typical DAC output waveform in time domain. [PITH_FULL_IMAGE:figures/full_fig_p005_15.png] view at source ↗
Figure 16
Figure 16. Figure 16: Delay test results with different input codes. [PITH_FULL_IMAGE:figures/full_fig_p005_16.png] view at source ↗
Figure 17
Figure 17. Figure 17: The spectrum of be as low as 20 μm frequency response test results. (a) and (b) is the amplitude-frequency response and phase-frequency response, respectively [PITH_FULL_IMAGE:figures/full_fig_p006_17.png] view at source ↗
read the original abstract

Shanghai Synchrotron Radiation Facility (SSRF), is one of the third-generation high-beam current (3.5 GeV) synchrotron light sources. In the storage ring of SSRF, multi-bunch instabilities would increase beam emittance and energy spread, which degrade beam quality and even cause beam loss. To address the above issues, a Transverse Feedback System is indispensable for SSRF, in which the key component is the bunch-by-bunch transverse feedback electronics. The whole feedback system consists of five main parts: Beam Position Monitor (BPM), RF front-end, signal processor, RF amplifier, and vertical/horizontal transverse kickers. The dissertation focuses on the signal processor we design, which is the main part of the feedback electronics. We conducted initial testing on the signal processor to evaluate its performance and function. Test results indicate that ENOB of the Analog-to-Digital Conversion circuit is better than 10 bit with 100 MHz input signal, and remains better than 9.5 bit up to 300 MHz, which is good enough for the required 7.9 bit; the frequency response of the whole system also concords well with the simulation results, and the suppression in amplitude response at the critical frequency points is better 35 dB while the uncertainty of phase response is better than 2 degree, all meeting the application requirement.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

1 major / 2 minor

Summary. The manuscript describes the design of bunch-by-bunch transverse feedback electronics for the SSRF storage ring, with emphasis on the signal processor. Bench tests are reported to show that the ADC achieves ENOB >10 bits at 100 MHz input and >9.5 bits at 300 MHz (exceeding the 7.9-bit requirement), while the overall frequency response matches simulations with >35 dB amplitude suppression at critical frequencies and <2° phase uncertainty, satisfying the stated application requirements.

Significance. If the reported bench-test metrics translate to operational conditions, the work delivers a functional transverse feedback processor that can suppress multi-bunch instabilities in a third-generation light source, directly supporting improved beam emittance and stability. The concrete numerical results (ENOB values, suppression levels, phase uncertainty) constitute a practical engineering contribution with clear relevance to synchrotron instrumentation.

major comments (1)
  1. [Test Results] Test Results section: ENOB and frequency-response data are obtained exclusively with continuous sinusoidal inputs. Real BPM signals consist of short bunches repeating at the ~0.5 MHz revolution frequency plus harmonics, superimposed on beam-induced noise and subject to RF timing constraints; no measurements or analysis are provided demonstrating that the quoted ENOB (>9.5 bit) and suppression (>35 dB) remain valid under pulsed excitation or realistic noise/timing conditions.
minor comments (2)
  1. [Abstract] Abstract: the phrase 'suppression ... is better 35 dB' is missing 'than'.
  2. [Abstract] Abstract: 'concords well with the simulation results' should be rephrased for standard technical English (e.g., 'agrees well').

Simulated Author's Rebuttal

1 responses · 0 unresolved

We thank the referee for the positive assessment of the significance of our work and for the detailed comment on the test results. We provide a point-by-point response below.

read point-by-point responses

  1. Referee: [Test Results] Test Results section: ENOB and frequency-response data are obtained exclusively with continuous sinusoidal inputs. Real BPM signals consist of short bunches repeating at the ~0.5 MHz revolution frequency plus harmonics, superimposed on beam-induced noise and subject to RF timing constraints; no measurements or analysis are provided demonstrating that the quoted ENOB (>9.5 bit) and suppression (>35 dB) remain valid under pulsed excitation or realistic noise/timing conditions.

    Authors: The referee is correct that our reported ENOB and frequency response measurements were performed using continuous-wave sinusoidal inputs. This approach follows standard practices for ADC characterization (per IEEE standards) and for verifying the analog and digital filter responses in the frequency domain. The bunch-by-bunch feedback system processes signals whose spectral content lies within the tested frequency range (up to 300 MHz), and the >35 dB suppression is achieved by the digital notch filter designed for the revolution harmonics. Nevertheless, we acknowledge that direct validation with pulsed bunch-like signals or under beam noise conditions was not included in the manuscript. We will revise the Test Results section to include a brief discussion of this point, explaining the rationale for the chosen test method and noting that full system validation with the beam is planned as future work. This constitutes a partial revision. revision: partial

Circularity Check

0 steps flagged

No circularity: hardware design report with direct bench measurements only

full rationale

The paper describes the design and laboratory testing of transverse feedback electronics. All reported metrics (ENOB >10 bit at 100 MHz, >9.5 bit at 300 MHz; >35 dB suppression; <2° phase uncertainty) are direct empirical measurements from sinusoidal inputs on the bench. No equations, derivations, fitted parameters, predictions, or self-citations are used to obtain the central claims; the results do not reduce to any inputs by construction. The paper is self-contained against external benchmarks with no load-bearing self-referential steps.

Axiom & Free-Parameter Ledger

0 free parameters · 2 axioms · 0 invented entities

The abstract relies on standard domain assumptions from accelerator physics and electronics testing; no free parameters, new axioms, or invented entities are introduced.

axioms (2)
  • domain assumption The required effective number of bits for the application is 7.9.
    Stated directly in the abstract as the benchmark the measured ENOB must exceed.
  • domain assumption Bench tests with continuous-wave inputs adequately proxy the pulsed, noisy signals from beam position monitors in the storage ring.
    Implicit in the choice of test signals and the claim that results meet application requirements.

pith-pipeline@v0.9.0 · 5781 in / 1396 out tokens · 27562 ms · 2026-05-24T16:54:06.668513+00:00 · methodology

discussion (0)

Sign in with ORCID, Apple, or X to comment. Anyone can read and Pith papers without signing in.

Reference graph

Works this paper leans on

28 extracted references · 28 canonical work pages

  1. [1]

    ADC Performance Test The high-speed high-resolution A/D conversion is a crucial part in the system. We performed the ADC dynamic analysis based on the IEEE Std.1241-2010 [22] to assess the circuit × Revolution clock Read Pointer FIR_out Output Pointer Moving Direction C1 C5 C717 C9 … Cn+4 Cn Cn-4 … 5 performance. SMA 100A, a high performance signal source...

    work page 2010

  2. [2]

    DAC Performance Test Performance of the D/A conversion circuit also directly influences quality of the feedback signal. Fig. 14 shows the DAC output voltages with different input codes. A good linearity is observed according to the test results, and the Integral Non-Linearity (INL) is better than 0.165%FS. Fig. 14. The DAC output voltages with different i...

    work page

  3. [3]

    Time Delay Test Since precise timing is very important for the transvers feedback system, tests were also conducted to evaluate the delay adjust ability of the delay line chip, which is the key part for this function. Fig. 16. Delay test results with different input codes. 0 50 100 150 200 250 -160 -140 -120 -100 -80 -60 -40 -20 0 20 Analog Input Frequenc...

    work page 2000

  4. [4]

    We established a model according to the requirement of the signal processor on the platform of MATLAB, and then we obtained the frequency response of the expected feedback function

    Functionality Test We also conducted tests to evaluate the performance of the whole feedback signal processor. We established a model according to the requirement of the signal processor on the platform of MATLAB, and then we obtained the frequency response of the expected feedback function. Then we used the network analyzer Agilent E5071C to obtain the a...

    work page

  5. [5]

    Front-end signal analysis of the transverse feedback system for SSRF,

    L. Han et al., "Front-end signal analysis of the transverse feedback system for SSRF," Nuclear Science and Techniques vol. 19, no. 5, pp. 274-277, May. 2008

    work page 2008

  6. [6]

    Excitation curve calibration for the SSRF magnet system,

    X. Zhou et al., "Excitation curve calibration for the SSRF magnet system," Chinese Physics C vol. 34, no. 5, pp. 589-592, May. 2010

    work page 2010

  7. [7]

    Lattice Design for SSRF Storage Ring,

    G. Liu et al., "Lattice Design for SSRF Storage Ring," High Energy Physics and Nuclear Physics vol. 30, Supp.I, pp. 144-146, Feb. 2006

    work page 2006

  8. [8]

    Digital bunch-by-bun ch transverse feedback system at SSRF,

    R. Yuan et al., "Digital bunch-by-bun ch transverse feedback system at SSRF," Science China Physics, Mechanics and Astronomy, vol. 54, no. 2, pp. 305-308, 2011

    work page 2011

  9. [9]

    Simulation of a transverse feedback system for the SSRF storage ring,

    B. Jiang, et al., "Simulation of a transverse feedback system for the SSRF storage ring," High Energy Physics and Nuclear Physics, vol. 31, no. 10, pp. 956-961, 2007

    work page 2007

  10. [10]

    The application of FPGA-based DSP module in SSRF,

    Y. Kim et al. “The application of FPGA-based DSP module in SSRF,” Nuclear Techniques vol. 31, no. 10, pp. 736-739, Oct. 2008

    work page 2008

  11. [11]

    Development of a high-speed digital signal process system for bunch-by-bunch feedback systems,

    M. Tobiyama et al., “Development of a high-speed digital signal process system for bunch-by-bunch feedback systems,” Physical Review Special Topics-Accelerators and Beams vol. 3, no. 1, pp. 012801, Jan. 2000

    work page 2000

  12. [12]

    Design and Commissioning of a Bunch by Bunch Feedback System for The Australian Synchrotron,

    M. Spencer et al., “Design and Commissioning of a Bunch by Bunch Feedback System for The Australian Synchrotron,” Proceedings of EPAC08, Genova, 2008: 3306. 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 -100 -90 -80 -70 -60 -50 -40 -30 -20 tune/fmc Amplitude(dB) x y 35dB 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 -180 -135 -90 -45 0 45 90 135 180 tun...

    work page 2008

  13. [13]

    The ELETTRA Digital Multi-Bunch Feedback Systems,

    D. Bulfone et al., "The ELETTRA Digital Multi-Bunch Feedback Systems," proc. of EPAC. 2002

    work page 2002

  14. [14]

    Development of measurement and transverse feedback system at HLS,

    J. Wang et al., "Development of measurement and transverse feedback system at HLS," Proceedings of the 2005 Particle Accelerator Conference, IEEE, 2005

    work page 2005

  15. [15]

    Digital processing electronics for the ELETTRA transverse multi-bunch feedback system,

    M. Lonza et al., "Digital processing electronics for the ELETTRA transverse multi-bunch feedback system," International Conference on Accelerator and Large Experimental Physics Control Systems , trieste, Italy, 1999

    work page 1999

  16. [16]

    Beam tests of the LHC transverse feedback system,

    W. Höfle et al., "Beam tests of the LHC transverse feedback system," Proceedings of RuPAC pp. 275-279, 2010

    work page 2010

  17. [17]

    Bunch by Bunch Feedback Systems For J-PARC MR

    M. Tobiyama et al., "Bunch by Bunch Feedback Systems For J-PARC MR." Proceedings of IPAC10, Kyoto, Japan, May. 2011

    work page 2011

  18. [18]

    Bunch-by-bunch Feedback for the Photon Factory Storage Ring,

    Q. Cheng et al., "Bunch-by-bunch Feedback for the Photon Factory Storage Ring," Proceedings of EPAC, Vol. 6, 2006

    work page 2006

  19. [19]

    State of the SLS multi bunch feedbacks,

    M. Dehler et al., "State of the SLS multi bunch feedbacks," Proceedings of APAC, Vol. 7, 2007

    work page 2007

  20. [20]

    Digital bunch-by-bunch transverse feedback system at SSRF,

    R. Yuan et al. “Digital bunch-by-bunch transverse feedback system at SSRF,” Science China Physics, Mechanics and Astronomy vol. 54, suppl.2, pp. 305-308, Dec. 2011

    work page 2011

  21. [21]

    [Online].Available: http://www.xilinx.com/support/documentation/ip_documentation/fir_co mpiler/v6_3/ds795_fir_compiler.pdf

    LogiCORE IP FIR Compiler v6.3, Xilinx Inc., 2011. [Online].Available: http://www.xilinx.com/support/documentation/ip_documentation/fir_co mpiler/v6_3/ds795_fir_compiler.pdf

    work page 2011

  22. [22]

    Digital Transverse Bunch-by-Bunch Feedback System for HLS,

    Z. Zhou et al., "Digital Transverse Bunch-by-Bunch Feedback System for HLS," Annual Meeting of Particle Accelerator Society of Japan, 2008

    work page 2008

  23. [23]

    Transverse feedback development at SOLEIL,

    R. Nagaoka et al., "Transverse feedback development at SOLEIL," 2007 IEEE Particle Accelerator Conference (PAC). IEEE, 2007

    work page 2007

  24. [24]

    An FPGA-based bunch-to-bunch feedback system at the Advanced Photon Source

    Yao, C-Y., E. Norum, and N. DiMonte. "An FPGA-based bunch-to-bunch feedback system at the Advanced Photon Source." 2007 IEEE Particle Accelerator Conference (PAC), IEEE, 2007

    work page 2007

  25. [25]

    Single-loop two-dimensional transverse feedback for Photon Factory,

    T. Nakamura et al., "Single-loop two-dimensional transverse feedback for Photon Factory," Proc. of EPAC, Vol. 6, 2006

    work page 2006

  26. [26]

    1241-2010, Jan

    IEEE Standard for Terminology and Test Methods for Analog-to-Digital Converters, IEEE Std. 1241-2010, Jan. 2011

    work page 2010

  27. [27]

    A systematic study of a transverse feedback system with a two-tap FIR filter,

    Y. Minagawa et al., "A systematic study of a transverse feedback system with a two-tap FIR filter," Proc. of EPAC, 1996

    work page 1996

  28. [28]

    Study of transverse bunch-by-bunch feedback systems based on the two tap FIR filter,

    Y. Minagawa et al., "Study of transverse bunch-by-bunch feedback systems based on the two tap FIR filter," Nuclear Instruments and Methods in Physics Research Section A vol. 416, pp. 193-209, Nov. 1996

    work page 1996