Pith. sign in

REVIEW

A hardware-efficient leakage-reduction scheme for quantum error correction with superconducting transmon qubits

Not yet reviewed by Pith; the record is open.

This paper has not been read by Pith yet. Machine review is queued; the pith claim, tier, and objections will appear here once it completes.

SPECIMEN: schema-true, not a live event

T0 review · schema-true

One-sentence machine reading of the paper's core claim.

pith:XXXXXXXX · record.json · timestamp

arxiv 2102.08336 v2 pith:6S36VD6E submitted 2021-02-16 quant-ph

classification quant-ph
keywords errorleakagequbitsschemecodecomputationalcorrectionleakage-reduction
verification ladder T0 review T1 audit T2 compute T3 formal

Signed reviews

No signed human review yet.

0 comments
abstract

Leakage outside of the qubit computational subspace poses a threatening challenge to quantum error correction (QEC). We propose a scheme using two leakage-reduction units (LRUs) that mitigate these issues for a transmon-based surface code, without requiring an overhead in terms of hardware or QEC-cycle time as in previous proposals. For data qubits we consider a microwave drive to transfer leakage to the readout resonator, where it quickly decays, ensuring that this negligibly affects the coherence within the computational subspace for realistic system parameters. For ancilla qubits we apply a $|1\rangle\leftrightarrow|2\rangle$ $\pi$ pulse conditioned on the measurement outcome. Using density-matrix simulations of the distance-3 surface code we show that the average leakage lifetime is reduced to almost 1 QEC cycle, even when the LRUs are implemented with limited fidelity. Furthermore, we show that this leads to a significant reduction of the logical error rate. This LRU scheme opens the prospect for near-term scalable QEC demonstrations.

Discussion (0). Continue with ORCID to comment.

Pith tools