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Using a Performance Model to Implement a Superscalar CVA6

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arxiv 2410.01442 v1 pith:W6NBEZG6 submitted 2024-10-02 cs.AR

Using a Performance Model to Implement a Superscalar CVA6

classification cs.AR
keywords performancecva6modelsuperscalarcoremarkevaluatefeatureaccuracy
verification ladder T0 review T1 audit T2 compute T3 formal T4 reserved
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A performance model of CVA6 RISC-V processor is built to evaluate performance related modifications before implementing them in RTL. Its accuracy is 99.2% on CoreMark. This model is used to evaluate a superscalar feature for CVA6. During design phase, the model helped detecting and fixing performance bugs. The superscalar feature resulted in a CVA6 performance improvement of 40% on CoreMark.

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