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arxiv: 2605.03241 · v2 · pith:SBZ6D4QXnew · submitted 2026-05-05 · ⚛️ physics.optics · cs.AI

OptiLookUp: An Optical ROM-Based Lookup Table Engine for Photonic Accelerators

Pith reviewed 2026-05-22 10:48 UTC · model grok-4.3

classification ⚛️ physics.optics cs.AI
keywords optical ROMmicroring resonatorsphotonic acceleratorslookup tablesnonlinear activationssilicon photonicsreconfigurable opticsphotonic memory
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The pith

A photonic ROM using microring resonators encodes nonlinear activation mappings directly in spectral responses for 12.5 GHz lookup in silicon photonics accelerators.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper presents a reconfigurable optical ROM architecture that stores predefined input-output mappings in the spectral responses of integrated microring resonators. Banked sub-arrays combined with an optical decoding mechanism and transistor-based selectors reduce cumulative insertion loss while enabling activation of different mappings without physical light rerouting. Device-level simulations on a silicon photonics platform confirm stable light-to-current transfer at data rates up to 12.5 GHz and demonstrate direct implementation of functions such as sigmoid, tanh, ReLU, and exponential for photonic accelerator use.

Core claim

The optical ROM encodes predefined input-output mappings directly in the spectral response of microring resonators, enabling deterministic lookup-based operation without dynamic computation during readout. Compact banked sub-arrays addressed through optical decoding and controlled by transistor-based optical selectors achieve reconfigurability and lower loss. Simulations on the GlobalFoundries 45SPCLO platform show reliable operation up to 12.5 GHz with integrated photodiode readout, supporting nonlinear activation functions including sigmoid, tanh, ReLU, and exponential mappings.

What carries the argument

Banked sub-arrays of microring resonators whose spectral responses encode mappings, selectively addressed by optical decoding and activated via transistor-based optical selectors.

If this is right

  • Nonlinear activation functions can be realized through optical lookup rather than electronic computation in photonic accelerators.
  • Parallel high-bandwidth access at 12.5 GHz becomes available for deterministic memory operations.
  • Reconfigurability allows the same hardware to switch between different activation mappings without redesign.
  • Banked sub-arrays limit cumulative insertion loss as table size grows.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • Full integration with other photonic neural network components could produce end-to-end optical inference pipelines.
  • Similar spectral encoding might apply to other deterministic functions beyond activations if loss budgets permit.
  • Real-device variation studies would be needed to assess whether wavelength control remains sufficient without tuning.

Load-bearing premise

Device-level simulations on the GlobalFoundries 45SPCLO silicon photonics platform accurately predict fabricated device behavior for cumulative insertion loss, wavelength control, and integration without post-fabrication tuning or variation analysis.

What would settle it

Fabricate the proposed ROM on the GlobalFoundries 45SPCLO platform and measure whether light-to-current transfer remains stable with correct sigmoid, tanh, ReLU, and exponential mappings at 12.5 GHz data rates.

Figures

Figures reproduced from arXiv: 2605.03241 by Akhilesh Jaiswal, Ankur Singh.

Figure 1
Figure 1. Figure 1: (a) Optical 4-bit ROM implemented using microring resonators. (b) Nonlinear view at source ↗
Figure 2
Figure 2. Figure 2: Proposed scalable banked photonic ROM architecture. (a) Overall banked ROM view at source ↗
Figure 3
Figure 3. Figure 3: Programmable photonic ROM with REST-encoded function implementation. (a) view at source ↗
Figure 4
Figure 4. Figure 4: Shared analog and digital readout layer for the proposed banked photonic ROM. view at source ↗
Figure 5
Figure 5. Figure 5: Analog output characteristics of the proposed optical ROM compared with ideal view at source ↗
Figure 6
Figure 6. Figure 6: Digitally quantized output characteristics of the proposed optical ROM compared view at source ↗
Figure 7
Figure 7. Figure 7: Transient response of the photonic ROM for the ReLU function, showing selector view at source ↗
read the original abstract

Read-only memory (ROM) provides deterministic access to predefined data mappings. Extending ROM concepts to the optical domain enables high-bandwidth, low-latency, and parallel memory access, but realizing compact and reconfigurable optical ROM remains challenging due to loss, wavelength control, and integration constraints. This work presents a high-speed, reconfigurable photonic ROM architecture implemented using integrated microring resonators (MRRs). The ROM encodes predefined input-output mappings directly in the spectral response of the photonic devices, enabling deterministic lookup-based operation without dynamic computation during readout. To improve scalability and reduce cumulative insertion loss, the architecture employs compact banked sub-arrays that are selectively addressed through an optical decoding mechanism. Reconfigurability is achieved using transistor-based optical selectors, allowing different ROM banks to be activated without physical light rerouting or interferometric structures. The proposed photonic ROM is designed and evaluated using device-level simulations based on the GlobalFoundries 45SPCLO silicon photonics platform. Simulation results demonstrate reliable operation at data rates up to 12.5 GHz, with stable light-to-current transfer characteristics obtained through integrated photodiode readout. The optical ROM can be used to implement nonlinear activation functions utilised in photonic accelerator architectures, including sigmoid, tanh, ReLU, and exponential mappings.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

2 major / 1 minor

Summary. The manuscript proposes OptiLookUp, a photonic ROM architecture for lookup-table-based nonlinear activations in photonic accelerators. It encodes predefined mappings in the spectral responses of microring resonators (MRRs), employs banked sub-arrays with optical decoding and transistor-based selectors for reconfigurability and reduced loss, and reports device-level simulations on the GlobalFoundries 45SPCLO platform showing stable light-to-current transfer and reliable operation at data rates up to 12.5 GHz for functions including sigmoid, tanh, ReLU, and exponential.

Significance. If the simulation-to-fabrication correspondence holds, the design offers a compact, deterministic alternative to dynamic nonlinear computation in photonic accelerators, with the banked sub-array and transistor-selector approach addressing cumulative insertion loss and reconfigurability without interferometric rerouting. The work provides a concrete platform-specific implementation path for optical ROMs.

major comments (2)
  1. [Abstract and Simulation Results] Abstract and results sections: The central claims of reliable 12.5 GHz operation and stable transfer characteristics rest entirely on device simulations without any Monte Carlo, corner-case, or fabrication-tolerance analysis for MRR resonance wavelengths, coupling strengths, waveguide width/thickness variation, or temperature drift. This directly undermines extrapolation to deterministic ROM mappings in fabricated devices, as resonance misalignment would break the input-output encoding.
  2. [Architecture Description] Architecture description: No quantitative error budget or cumulative insertion-loss analysis is provided for the banked sub-array addressing and optical decoding mechanism under realistic process variation, which is required to substantiate the scalability and low-loss claims for array-level integration.
minor comments (1)
  1. [Abstract] The abstract states 'stable light-to-current transfer characteristics obtained through integrated photodiode readout' without specifying the photodiode model parameters or readout circuit details used in the simulations.

Simulated Author's Rebuttal

2 responses · 0 unresolved

We thank the referee for the constructive comments on our manuscript. We have addressed the concerns regarding the robustness of our simulation results and the need for quantitative loss analysis by revising the relevant sections to include additional discussion and estimates based on the platform specifications.

read point-by-point responses
  1. Referee: [Abstract and Simulation Results] Abstract and results sections: The central claims of reliable 12.5 GHz operation and stable transfer characteristics rest entirely on device simulations without any Monte Carlo, corner-case, or fabrication-tolerance analysis for MRR resonance wavelengths, coupling strengths, waveguide width/thickness variation, or temperature drift. This directly undermines extrapolation to deterministic ROM mappings in fabricated devices, as resonance misalignment would break the input-output encoding.

    Authors: We agree that the manuscript would benefit from explicit discussion of fabrication tolerances, as the presented results rely on nominal device simulations using the GlobalFoundries 45SPCLO platform models. In the revised version, we have added a paragraph in the results section addressing sensitivity to resonance wavelength shifts (e.g., due to width/thickness variations and temperature), including order-of-magnitude estimates of acceptable tolerances to maintain lookup accuracy for the demonstrated functions. We have also updated the abstract and conclusion to clarify that the 12.5 GHz operation and stable transfer characteristics are shown under nominal simulation conditions, with a note that full Monte Carlo analysis is planned for future work involving fabricated devices. This strengthens the presentation without overstating the current scope. revision: partial

  2. Referee: [Architecture Description] Architecture description: No quantitative error budget or cumulative insertion-loss analysis is provided for the banked sub-array addressing and optical decoding mechanism under realistic process variation, which is required to substantiate the scalability and low-loss claims for array-level integration.

    Authors: We acknowledge the value of a quantitative error budget to support the scalability claims. In the revised architecture description, we have incorporated an error budget table and accompanying text that breaks down insertion loss contributions from MRRs, waveguides, couplers, and transistor selectors in the banked sub-arrays. Using typical process variation parameters reported for the 45SPCLO platform (e.g., waveguide dimension variations of ±5-10 nm), we estimate the cumulative loss per path and show how the optical decoding and selective bank activation reduce the number of cascaded elements compared to a monolithic array. This analysis supports the low-loss advantage while noting that actual fabricated performance may vary. revision: yes

Circularity Check

0 steps flagged

No circularity in simulation-driven architecture claims

full rationale

The paper presents an architectural proposal for an optical ROM using MRR spectral encoding and banked sub-arrays, with performance metrics obtained directly from device-level simulations on the GlobalFoundries 45SPCLO platform. No equations, first-principles derivations, or predictions are shown that reduce reported data rates, insertion loss, or activation mappings to quantities defined by fitted parameters or self-referential inputs within the paper. Claims of 12.5 GHz operation and stable light-to-current transfer are presented as simulation outcomes without load-bearing self-citations, uniqueness theorems, or ansatzes that collapse the result to its own construction. The work is self-contained as an engineering design study.

Axiom & Free-Parameter Ledger

1 free parameters · 1 axioms · 0 invented entities

The design depends on standard assumptions about silicon photonics device models and the accuracy of the chosen foundry platform; no new physical entities are postulated.

free parameters (1)
  • MRR resonance wavelengths and coupling strengths
    Chosen to encode the target activation mappings; values are implicit design parameters set to achieve the desired spectral responses.
axioms (1)
  • domain assumption GlobalFoundries 45SPCLO silicon photonics platform models accurately capture loss, wavelength control, and integration behavior for the proposed MRR structures.
    Invoked when claiming reliable 12.5 GHz operation from device-level simulations.

pith-pipeline@v0.9.0 · 5756 in / 1374 out tokens · 28582 ms · 2026-05-22T10:48:56.368871+00:00 · methodology

discussion (0)

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Reference graph

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