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Safe Control under Uncertainty

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arxiv 1510.07313 v1 pith:EBASWZWA submitted 2015-10-25 cs.SY cs.AIcs.LOcs.ROcs.SY

classification cs.SYcs.AIcs.LOcs.RO
keywords propertieslogicprstlsafetemporalunderassumptioncontrol
verification ladder T0 review T1 audit T2 compute T3 formal
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Controller synthesis for hybrid systems that satisfy temporal specifications expressing various system properties is a challenging problem that has drawn the attention of many researchers. However, making the assumption that such temporal properties are deterministic is far from the reality. For example, many of the properties the controller has to satisfy are learned through machine learning techniques based on sensor input data. In this paper, we propose a new logic, Probabilistic Signal Temporal Logic (PrSTL), as an expressive language to define the stochastic properties, and enforce probabilistic guarantees on them. We further show how to synthesize safe controllers using this logic for cyber-physical systems under the assumption that the stochastic properties are based on a set of Gaussian random variables. One of the key distinguishing features of PrSTL is that the encoded logic is adaptive and changes as the system encounters additional data and updates its beliefs about the latent random variables that define the safety properties. We demonstrate our approach by synthesizing safe controllers under the PrSTL specifications for multiple case studies including control of quadrotors and autonomous vehicles in dynamic environments.

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  1. STL-based Optimization of Biomolecular Neural Networks for Regression and Control

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    STL robustness is used as a differentiable loss to train biomolecular neural networks for regression and closed-loop control in silico.

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