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MuPix7 - A fast monolithic HV-CMOS pixel chip for Mu3e

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arxiv 1610.02210 v2 pith:KKEIBXN5 submitted 2016-10-07 physics.ins-det

MuPix7 - A fast monolithic HV-CMOS pixel chip for Mu3e

classification physics.ins-det
keywords chippixelefficiencyhv-cmosmonolithicmupix7achievedactive
verification ladder T0 review T1 audit T2 compute T3 formal T4 reserved
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The MuPix7 chip is a monolithic HV-CMOS pixel chip, thinned down to 50 \mu m. It provides continuous self-triggered, non-shuttered readout at rates up to 30 Mhits/chip of 3x3 mm^2 active area and a pixel size of 103x80 \mu m^2. The hit efficiency depends on the chosen working point. Settings with a power consumption of 300 mW/cm^2 allow for a hit efficiency >99.5%. A time resolution of 14.2 ns (Gaussian sigma) is achieved. Latest results from 2016 test beam campaigns are shown.

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