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Security Protection for Magnetic Tunnel Junction

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arxiv 1704.08513 v1 pith:6S2JAIQ7 submitted 2017-04-27 cs.CR

classification cs.CR
keywords energysystemarchitecturebehaviourcircuitcomputingdesignidentification
verification ladder T0 review T1 audit T2 compute T3 formal

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Energy efficiency is one of the most important parameters for designing and building a computing system nowadays. Introduction of new transistor and memory technologies to the integrated circuits design have brought hope for low energy very large scale integration (VLSI) circuit design. This excellency is pleasant if the computing system is secure and the energy is not wasted through execution of malicious actions. In fact, it is required to make sure that the utilized transistor and memory devices function correctly and no error occurs in the system operation. In this regard, we propose a built-in-self-test architecture for security checking of the magnetic tunnel junction (MTJ) device under malicious process variations attack. Also, a general identification technique is presented to investigate the behaviour and activities of the employed circuitries within this MTJ testing architecture. The presented identification technique tries to find any abnormal behaviour using the circuit current signal.

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