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Improving Reliability, Security, and Efficiency of Reconfigurable Hardware Systems
Hardware Architecture · Submitted 28 Sep 2018
abstract compiled · 2026-09-23 · no language-model review
The authors' main claim In this treatise, my research on methods to improve efficiency, reliability, and security of reconfigurable hardware systems, i.e., FPGAs, through partial dynamic reconfiguration is outlined.
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The abstract, sentence by sentence
In this treatise, my research on methods to improve efficiency, reliability, and security of reconfigurable hardware systems, i.e., FPGAs, through partial dynamic reconfiguration is outlined. The efficiency of reconfigurable systems can be improved by loading optimized data paths on-the-fly on an FPGA fabric. This technique was applied to the acceleration of SQL queries for large database applications as well as for image and signal processing applications. The focus was not only on performance improvements and resource efficiency, but also the energy efficiency has been significantly improved. In the area of reliability, countermeasures against radiation-induced faults and aging effects for long mission times were investigated and applied to SRAM-FPGA-based satellite systems. Finally, to increase the security of cryptographic FPGA-based implementations against physical attacks, i.e., side-channel and fault injection analysis as well as reverse engineering, it is proposed to transform static circuit structures into dynamic ones by applying dynamic partial reconfiguration.
background contribution method result interpretation main claim
| # | sentence | role | the authors' own work | states the main conclusion | strength |
|---|---|---|---|---|---|
| s0 | In this treatise, my research on methods to improve efficiency, reliability, and security of reconfigurable hardware systems, i.e., FPGAs, through partial dynamic reconfiguration is outlined. | contribution 0.98 | 0.78 | 0.14 | asserted 0.77 |
| s1 | The efficiency of reconfigurable systems can be improved by loading optimized data paths on-the-fly on an FPGA fabric. | method 0.83 | 0.31 | 0.10 | asserted 0.84 |
| s2 | This technique was applied to the acceleration of SQL queries for large database applications as well as for image and signal processing applications. | contribution 0.64 | 0.76 | 0.05 | asserted 1.00 |
| s3 | The focus was not only on performance improvements and resource efficiency, but also the energy efficiency has been significantly improved. | result 0.97 | 0.84 | 0.10 | asserted 1.00 |
| s4 | In the area of reliability, countermeasures against radiation-induced faults and aging effects for long mission times were investigated and applied to SRAM-FPGA-based satellite systems. | contribution 0.98 | 0.85 | 0.05 | asserted 1.00 |
| s5 | Finally, to increase the security of cryptographic FPGA-based implementations against physical attacks, i.e., side-channel and fault injection analysis as well as reverse engineering, it is proposed to transform static circuit structures into dynamic ones by applying dynamic partial reconfiguration. | contribution 0.89 | 0.50 | 0.27 | hedged possibility 0.59 |
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The paper
Original abstract
In this treatise, my research on methods to improve efficiency, reliability, and security of reconfigurable hardware systems, i.e., FPGAs, through partial dynamic reconfiguration is outlined. The efficiency of reconfigurable systems can be improved by loading optimized data paths on-the-fly on an FPGA fabric. This technique was applied to the acceleration of SQL queries for large database applications as well as for image and signal processing applications. The focus was not only on performance improvements and resource efficiency, but also the energy efficiency has been significantly improved. In the area of reliability, countermeasures against radiation-induced faults and aging effects for long mission times were investigated and applied to SRAM-FPGA-based satellite systems. Finally, to increase the security of cryptographic FPGA-based implementations against physical attacks, i.e., side-channel and fault injection analysis as well as reverse engineering, it is proposed to transform static circuit structures into dynamic ones by applying dynamic partial reconfiguration.
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