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Denial-of-Service Attacks on Shared Cache in Multicore: Analysis and Prevention

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arxiv 1903.01314 v1 pith:YLVBOSZE submitted 2019-03-04 cs.AR cs.OS

classification cs.ARcs.OS
keywords cacheattacksmulticoreshareddenial-of-servicemechanismplatformplatforms
verification ladder T0 review T1 audit T2 compute T3 formal
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In this paper we investigate the feasibility of denial-of-service (DoS) attacks on shared caches in multicore platforms. With carefully engineered attacker tasks, we are able to cause more than 300X execution time increases on a victim task running on a dedicated core on a popular embedded multicore platform, regardless of whether we partition its shared cache or not. Based on careful experimentation on real and simulated multicore platforms, we identify an internal hardware structure of a non-blocking cache, namely the cache writeback buffer, as a potential target of shared cache DoS attacks. We propose an OS-level solution to prevent such DoS attacks by extending a state-of-the-art memory bandwidth regulation mechanism. We implement the proposed mechanism in Linux on a real multicore platform and show its effectiveness in protecting against cache DoS attacks.

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Cited by 1 Pith paper

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score. Full citation record

  1. A Centralized Performance Monitoring Architecture for Heterogeneous Multicore SoCs

    cs.AR 2026-08 conditional novelty 6.0 of 10

    A centralized EVU-APMU hardware architecture collects and processes performance counter data on a dedicated side processor, demonstrated on a RISC-V SoC for memory regulation and function-level profiling.

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