Pith. sign in

REVIEW

Rapid flipping of parametric phase states

Not yet reviewed by Pith; the record is open.

This paper has not been read by Pith yet. Machine review is queued; the pith claim, tier, and objections will appear here once it completes.

SPECIMEN: schema-true, not a live event

T0 review · schema-true

One-sentence machine reading of the paper's core claim.

pith:XXXXXXXX · record.json · timestamp

arxiv 1905.11630 v2 pith:4F6O3KDS submitted 2019-05-28 physics.app-ph cond-mat.mes-hall

classification physics.app-phcond-mat.mes-hall
keywords logicoperationsparametronphasearchitecturescorrespondingflippingising
verification ladder T0 review T1 audit T2 compute T3 formal

Signed reviews

No signed human review yet.

0 comments
read the original abstract

Since the invention of the solid-state transistor, the overwhelming majority of computers followed the von Neumann architecture that strictly separates logic operations and memory. Today, there is a revived interest in alternative computation models accompanied by the necessity to develop corresponding hardware architectures. The Ising machine, for example, is a variant of the celebrated Hopfield network based on the Ising model. It can be realized with artifcial spins such as the `parametron' that arises in driven nonlinear resonators. The parametron encodes binary information in the phase state of its oscillation. It enables, in principle, logic operations without energy transfer and the corresponding speed limitations. In this work, we experimentally demonstrate flipping of parametron phase states on a timescale of an oscillation period, much faster than the ringdown time \tau that is often (erroneously) deemed a fundamental limit for resonator operations. Our work establishes a new paradigm for resonator-based logic architectures.

Discussion (0). Continue with ORCID to comment.

Pith tools