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Paper Citation Record · LEDGER

PC-DARTS: Partial Channel Connections for Memory-Efficient Architecture Search

As of 5 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 3 inbound Pith citation observations for arXiv:1907.05737.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
1907.05737 v4

Coverage vector

measured 0 of 0 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links

measured 3 of 3 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-05T06:32:48.257954+00:00

measured 3 of 3 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links, observed 2026-07-03T13:19:43.866226Z

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: arxiv_reference, observed 2026-07-03T13:28:18.389167Z

Reference resolution

0 of 0 outbound references displayed

  • verified exact0
  • verified fuzzy0
  • unresolved0
  • parse uncertain0
  • malformed identifier0
  • metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

No outbound reference observations are available for this paper version.

Pith citing papers

Observation 18e4eb2e-4d5a-459a-8679-c30d2e1d2dec · inbound

AutoMCU: Feasibility-First MCU Neural Network Customization via LLM-based Multi-Agent Systems cites this paper.

AutoMCU: Feasibility-First MCU Neural Network Customization via LLM-based Multi-Agent Systems PC-DARTS: Partial Channel Connections for Memory-Efficient Architecture Search

Reference 37

Resolution
verified exact
arxiv_id, observed 2026-05-22T10:01:22.885835Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

source=pdf_text observed=2026-05-22T10:01:14.578045Z digest=sha256:a46549752b370cf62cdb1e753c68c7e76841ab33424094045ebe435173fb2806

Observation b1102584-cca8-4f00-a424-e4096e9b8b36 · inbound

Bilevel Optimization for Neural Architecture Search cites this paper.

Bilevel Optimization for Neural Architecture Search PC-DARTS: Partial Channel Connections for Memory-Efficient Architecture Search

Reference 51

Resolution
verified exact
arxiv_id, observed 2026-06-30T07:34:22.005166Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

source=pdf_text observed=2026-06-30T07:25:50.831689Z digest=sha256:bd3e14dad0601dd83d9129dffe7469ad41e1f37303d1bab92fddc146654da372

Observation 0c18bacc-85da-4679-8b0a-efd3a6080285 · inbound

CamoNAS: Neural Architecture Search for Enhanced Camouflaged Object Detection cites this paper.

CamoNAS: Neural Architecture Search for Enhanced Camouflaged Object Detection PC-DARTS: Partial Channel Connections for Memory-Efficient Architecture Search

Reference 59

Resolution
metadata mismatch
arxiv_id, observed 2026-07-03T13:28:18.390663Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

source=pdf_text observed=2026-07-03T13:19:43.866226Z digest=sha256:e80d16d8578adb4b2704c4ad3ebded30e5e3d6a8501b7695e3a75ffc0d69f9a0