Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links, observed 2026-08-14T14:34:08.661637Z
Paper Citation Record · LEDGER
As of 16 August 2026, this Paper Citation Record lists 31 of 31 outbound references and 0 inbound Pith citation observations for arXiv:1908.02986.
A citation records a reference. It does not transfer a finding from one paper to another.
Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links, observed 2026-08-14T14:34:08.661637Z
One-hop event checks from named stored sources.
Source: scholarly_work_events, retraction_status_cache, observed 2026-08-16T06:30:59.297886+00:00
Pith citing papers itemized under the disclosed page cap.
Source: paper_references, paper_reference_links
A source-named dated measurement, never combined with another source.
Source: cited_works
31 of 31 outbound references displayed
External citation measurements
No source-named external measurement is stored.
Observation f4b848d5-d681-4ee4-b301-5a45d9836223 · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Software-based self-testing methodology for processor cores
Reference 1
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation a414541a-c6a0-4aa3-8a4c-41a146f5eb73 · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Software based self-testing of embedded processors
Reference 2
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation 266db0e5-2196-41d5-a80d-43728847ca88 · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Development Flow for On-Line Core Self-Test of Automotive Microcontrollers
Reference 3
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation beda7717-422c-45b4-9fb4-52fb891d6f78 · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors IEEE Design Test of Computers, v.27, no.3, 2010
Reference 4
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation b8481764-0553-4b1c-8c39-53e9a895bfb2 · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors On the in-field functional testing of decode units in pipelined risc processors
Reference 5
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation e4683bbc-5e9a-4552-98a6-c71b496cd17b · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors A flexible framework for the automatic generation of SBST programs
Reference 6
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation f542417e-ab7a-4179-a36a-693ffe99df14 · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Towards an automatic generation of diagnostic in-field sbst for processor components
Reference 7
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation 1a198c52-1e89-404c-8846-1e922aab64fd · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Unresolved cited work
Reference 8
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation 5f3f9a4f-b991-4590-823d-f53cf8903e2b · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Unresolved cited work
Reference 9
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation 89eaf068-c272-4b8d-a079-da6e1014e2b0 · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Simulation-based functional test generation for embedded processors
Reference 10
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation 645433dd-ae76-4dfd-b60e-01e5739844ec · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Kranitis, A
Reference 11
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation b8b1aac0-6c08-4549-bafe-7f707586514f · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Software-based self testing with multiple-level abstractions for soft processor cores
Reference 12
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation d87c9f86-bc59-4a8f-8f6f-384b80fc9fc8 · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Native mode functional test generation for processors with applications to self test and design validation
Reference 13
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation cbf5270b-2c20-4363-ac23-171835b5c578 · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Frits - a microprocessor functional bist method
Reference 14
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation 545a0c1b-8342-42fb-a4f2-27fab8a2b368 · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Unresolved cited work
Reference 15
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation 321aea51-c12a-47d3-ae25-3b095102ccfe · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Automatic test program generation: a case study
Reference 16
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation a2f2903d-4668-4a40-8b80-f86087dcd16b · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Zamboni, N
Reference 17
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation 8292bb22-67b3-40b2-8fe2-760411b567e2 · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Sanchez and M
Reference 18
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation 26192306-8056-419f-92ee-25c28331b3c8 · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Unresolved cited work
Reference 19
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation def8aa6d-e43d-4f0e-9a5d-0f6390cbbc54 · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors On the functional test of the cache coherency logic in multi-core systems
Reference 20
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation aeed31e0-2b1e-4bd5-a75f-0e2b4fb82586 · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Ravi, A.Raghunathan
Reference 21
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation e47a747b-5f4b-4d12-8f45-0a7e443d1b6b · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors 14th Int
Reference 22
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation e48aebb2-dc61-4d90-9029-fc93a25a0536 · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Hierarchical Pattern Faults for Describing Logic Circuit Failure Mechanisms
Reference 23
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation ec58b74c-73e6-4d61-b153-de4c61fea5fe · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Fault Diagnosis in Combinational Circuits by Solving Boolean Differential Equations
Reference 24
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation 07b9f281-bfbd-4922-b54b-9932bf06ff88 · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors On the Properties of the Input Pattern Fault Model
Reference 25
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation d3ead922-b4f1-4df1-8a92-ff2b92063c0d · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Adaptive Debug and Diagnosis Without Fault Dictionaries
Reference 26
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation fc4cac91-7f3a-46dc-9357-584c2387456d · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors On Finding a Nearly Minimal Set of Fault Detection Tests for Combinational Logic Nets
Reference 27
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation 574f15d1-b885-4f28-b899-631d2b416a7e · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors High-Level Test Data Generation for Software Based Self-Test in Microprocessors
Reference 28
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation b2de28ab-c681-4686-9d78-b16da430cce4 · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Parallel Pseudo-Exhaustive Testing of Array Multipliers with Data-Controlled Segmentation
Reference 29
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation 9052412b-5342-44ef-af28-fab77f81febd · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors MiniMIPS ISA
Reference 30
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
Observation 885f325c-cdbb-4daf-b199-b0483aabefda · outbound
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Rejuvenation of NBTI-Impacted Processors Using Evolutionary Generation of Assembler Programs,
Reference 31
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.
No inbound Pith citation observations are available.