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Paper Citation Record · LEDGER

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors

As of 16 August 2026, this Paper Citation Record lists 31 of 31 outbound references and 0 inbound Pith citation observations for arXiv:1908.02986.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
1908.02986 v1

Coverage vector

measured 31 of 31 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-08-14T14:34:08.661637Z

measured 31 of 31 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-16T06:30:59.297886+00:00

measured 0 of 0 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: cited_works

Reference resolution

31 of 31 outbound references displayed

  • verified exact0
  • verified fuzzy27
  • unresolved4
  • parse uncertain0
  • malformed identifier0
  • metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

Observation f4b848d5-d681-4ee4-b301-5a45d9836223 · outbound

This paper cites Software-based self-testing methodology for processor cores.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Software-based self-testing methodology for processor cores

Reference 1

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T14:34:09.216582Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.504276Z digest=sha256:1eceb0b92d14396f62822f2bbf9c415015fbdf0d8a88086db70c45ca59a70fcd

Observation a414541a-c6a0-4aa3-8a4c-41a146f5eb73 · outbound

This paper cites Software based self-testing of embedded processors.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Software based self-testing of embedded processors

Reference 2

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T14:34:09.199432Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.510066Z digest=sha256:d7e66d2ab413e6965087528d08f6e18cfac7da005cc6fec455152bff4139d6fb

Observation 266db0e5-2196-41d5-a80d-43728847ca88 · outbound

This paper cites Development Flow for On-Line Core Self-Test of Automotive Microcontrollers.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Development Flow for On-Line Core Self-Test of Automotive Microcontrollers

Reference 3

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T14:34:09.182471Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.515258Z digest=sha256:705ea6d9c18f27c20010f025136fbdb74e99c786943494239fa4bed1fbb60d57

Observation beda7717-422c-45b4-9fb4-52fb891d6f78 · outbound

This paper cites IEEE Design Test of Computers, v.27, no.3, 2010.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors IEEE Design Test of Computers, v.27, no.3, 2010

Reference 4

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T14:34:09.164992Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.520876Z digest=sha256:c8ed7cfb5b24a1ce89b8481107f2969d6e529b39c1686f80449a18845c1a96b6

Observation b8481764-0553-4b1c-8c39-53e9a895bfb2 · outbound

This paper cites On the in-field functional testing of decode units in pipelined risc processors.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors On the in-field functional testing of decode units in pipelined risc processors

Reference 5

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T14:34:09.148133Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.525920Z digest=sha256:1913d3145d85930f9f75af25a21de847fe7562c9b0c7f53f9efc685a90fd3624

Observation e4683bbc-5e9a-4552-98a6-c71b496cd17b · outbound

This paper cites A flexible framework for the automatic generation of SBST programs.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors A flexible framework for the automatic generation of SBST programs

Reference 6

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T14:34:09.131420Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.531736Z digest=sha256:b0f8ea922bbdce8751141931d3b38e4c2614275999f596e1c948d15678f19496

Observation f542417e-ab7a-4179-a36a-693ffe99df14 · outbound

This paper cites Towards an automatic generation of diagnostic in-field sbst for processor components.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Towards an automatic generation of diagnostic in-field sbst for processor components

Reference 7

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T14:34:09.114409Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.537415Z digest=sha256:e225e4fdfed487ba4f6eca3759ebd05c50b44699d6e9351fb0014c85bc496275

Observation 1a198c52-1e89-404c-8846-1e922aab64fd · outbound

This paper cites an unresolved cited work.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Unresolved cited work

Reference 8

Resolution
unresolved
raw_fallback, observed 2026-08-14T14:34:09.097992Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.542343Z digest=sha256:0dede3e5502f0def2bd58df5bef1d64a6aca9d89575875cc7a89e55c0078476d

Observation 5f3f9a4f-b991-4590-823d-f53cf8903e2b · outbound

This paper cites an unresolved cited work.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Unresolved cited work

Reference 9

Resolution
unresolved
raw_fallback, observed 2026-08-14T14:34:09.082006Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.547271Z digest=sha256:211b67c396a328e5d2ca87ad292366a231418f8ff9c1c095fbcdf848b71db272

Observation 89eaf068-c272-4b8d-a079-da6e1014e2b0 · outbound

This paper cites Simulation-based functional test generation for embedded processors.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Simulation-based functional test generation for embedded processors

Reference 10

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T14:34:09.065403Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.552392Z digest=sha256:1b4fbe82973d4b7f4fc2bfdba5adb381e621282a28a1ee7dad754bb4d59029cc

Observation 645433dd-ae76-4dfd-b60e-01e5739844ec · outbound

This paper cites Kranitis, A.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Kranitis, A

Reference 11

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T14:34:09.049430Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.558109Z digest=sha256:1fde94e6d8aa34f9aecf0fd4490789edf6afc8316bc0078aaf4baf451c29e13a

Observation b8b1aac0-6c08-4549-bafe-7f707586514f · outbound

This paper cites Software-based self testing with multiple-level abstractions for soft processor cores.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Software-based self testing with multiple-level abstractions for soft processor cores

Reference 12

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T14:34:09.033026Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.562899Z digest=sha256:3bdd1f12b2031839e036b9b2e0e94be6f8b9970454b902155b03d84a01094e60

Observation d87c9f86-bc59-4a8f-8f6f-384b80fc9fc8 · outbound

This paper cites Native mode functional test generation for processors with applications to self test and design validation.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Native mode functional test generation for processors with applications to self test and design validation

Reference 13

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T14:34:09.011000Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.567916Z digest=sha256:f9efd402db887384df10d6100d11df3ef4120f12ffa179eaf3c10b11dde8606c

Observation cbf5270b-2c20-4363-ac23-171835b5c578 · outbound

This paper cites Frits - a microprocessor functional bist method.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Frits - a microprocessor functional bist method

Reference 14

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T14:34:08.992014Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.572892Z digest=sha256:42adeb5d98f8a4bf4e6c86b416e96c35a621f6bff3b8517fdba285c407a2321c

Observation 545a0c1b-8342-42fb-a4f2-27fab8a2b368 · outbound

This paper cites an unresolved cited work.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Unresolved cited work

Reference 15

Resolution
unresolved
raw_fallback, observed 2026-08-14T14:34:08.973889Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.578192Z digest=sha256:da197053a86108fa8e152238bc493dc0d6eba0bff30a8e14f92af5666376620d

Observation 321aea51-c12a-47d3-ae25-3b095102ccfe · outbound

This paper cites Automatic test program generation: a case study.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Automatic test program generation: a case study

Reference 16

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T14:34:08.956979Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.583018Z digest=sha256:23b26392ef8b5b6f7be8912d258425a0506afb201b9093ecfcda6c46f1749803

Observation a2f2903d-4668-4a40-8b80-f86087dcd16b · outbound

This paper cites Zamboni, N.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Zamboni, N

Reference 17

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T14:34:08.941048Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.588383Z digest=sha256:886492dc00883b3810a5d5ddcaa6e13bbd9bbe12a4eadb342663aced99873ae0

Observation 8292bb22-67b3-40b2-8fe2-760411b567e2 · outbound

This paper cites Sanchez and M.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Sanchez and M

Reference 18

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T14:34:08.924623Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.593845Z digest=sha256:b96406c1ef3257022478c2b4eadb4b37d1c02239236029cdc957a2e523c29204

Observation 26192306-8056-419f-92ee-25c28331b3c8 · outbound

This paper cites an unresolved cited work.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Unresolved cited work

Reference 19

Resolution
unresolved
raw_fallback, observed 2026-08-14T14:34:08.908239Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.598593Z digest=sha256:17f88c8409acb3849bb4a6d54cc29c1820139de0a147dd963a61db547f5784d4

Observation def8aa6d-e43d-4f0e-9a5d-0f6390cbbc54 · outbound

This paper cites On the functional test of the cache coherency logic in multi-core systems.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors On the functional test of the cache coherency logic in multi-core systems

Reference 20

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T14:34:08.892294Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.603246Z digest=sha256:7e6811a75c2c733495cc6bb1edf0f19ee38bb5dbd428e71ef1fe278dfdcea30b

Observation aeed31e0-2b1e-4bd5-a75f-0e2b4fb82586 · outbound

This paper cites Ravi, A.Raghunathan.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Ravi, A.Raghunathan

Reference 21

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T14:34:08.875403Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.607715Z digest=sha256:ceb7446925cf83f5b6634bd865e1ca28587600374a91ddc4fdbccab99001a23f

Observation e47a747b-5f4b-4d12-8f45-0a7e443d1b6b · outbound

This paper cites 14th Int.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors 14th Int

Reference 22

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T14:34:08.858762Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.612731Z digest=sha256:6092e9a21ede77f425f004e189f179d47cf20990c80d15331cb0ee61944d5069

Observation e48aebb2-dc61-4d90-9029-fc93a25a0536 · outbound

This paper cites Hierarchical Pattern Faults for Describing Logic Circuit Failure Mechanisms.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Hierarchical Pattern Faults for Describing Logic Circuit Failure Mechanisms

Reference 23

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T14:34:08.842044Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.617804Z digest=sha256:12a6c1ce36152ace806bfdf1218d54342f9d0ea9e4371dd1dc07ac41db378e5a

Observation ec58b74c-73e6-4d61-b153-de4c61fea5fe · outbound

This paper cites Fault Diagnosis in Combinational Circuits by Solving Boolean Differential Equations.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Fault Diagnosis in Combinational Circuits by Solving Boolean Differential Equations

Reference 24

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T14:34:08.825176Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.622471Z digest=sha256:38167c613147babc1ae794d794dd69e90070a95953478d70c1a711668495f47e

Observation 07b9f281-bfbd-4922-b54b-9932bf06ff88 · outbound

This paper cites On the Properties of the Input Pattern Fault Model.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors On the Properties of the Input Pattern Fault Model

Reference 25

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T14:34:08.808033Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.628493Z digest=sha256:6e95ac0c1f47a6d2c2d034a7f4260e8c68f8187f57123df871116f7a61c8c79f

Observation d3ead922-b4f1-4df1-8a92-ff2b92063c0d · outbound

This paper cites Adaptive Debug and Diagnosis Without Fault Dictionaries.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Adaptive Debug and Diagnosis Without Fault Dictionaries

Reference 26

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T14:34:08.789591Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.633868Z digest=sha256:083425b47e577cfab745dcc3adaf2bfe90511fef84c95520fdfb649f313ca3e8

Observation fc4cac91-7f3a-46dc-9357-584c2387456d · outbound

This paper cites On Finding a Nearly Minimal Set of Fault Detection Tests for Combinational Logic Nets.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors On Finding a Nearly Minimal Set of Fault Detection Tests for Combinational Logic Nets

Reference 27

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T14:34:08.771236Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.638977Z digest=sha256:545d9de5e775df1d079f6929e26f69bbe21cbf42fdddf5f0dd0c27a13b7e54fb

Observation 574f15d1-b885-4f28-b899-631d2b416a7e · outbound

This paper cites High-Level Test Data Generation for Software Based Self-Test in Microprocessors.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors High-Level Test Data Generation for Software Based Self-Test in Microprocessors

Reference 28

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T14:34:08.754184Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.644927Z digest=sha256:d254db8e14d7df5bb76c12eea667e1257671e30d1dd47dd86a1c5e8273efd696

Observation b2de28ab-c681-4686-9d78-b16da430cce4 · outbound

This paper cites Parallel Pseudo-Exhaustive Testing of Array Multipliers with Data-Controlled Segmentation.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Parallel Pseudo-Exhaustive Testing of Array Multipliers with Data-Controlled Segmentation

Reference 29

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T14:34:08.737300Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.649962Z digest=sha256:ad0f9c0663d9f772960319e76e8da2b3cd8fb7876bca1ff26d1b74928f516916

Observation 9052412b-5342-44ef-af28-fab77f81febd · outbound

This paper cites MiniMIPS ISA.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors MiniMIPS ISA

Reference 30

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T14:34:08.720057Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.656562Z digest=sha256:bcde19f622d93e384a2b8e78080742f3723a8a4a766ff6680848feaff51ba681

Observation 885f325c-cdbb-4daf-b199-b0483aabefda · outbound

This paper cites Rejuvenation of NBTI-Impacted Processors Using Evolutionary Generation of Assembler Programs,.

High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors Rejuvenation of NBTI-Impacted Processors Using Evolutionary Generation of Assembler Programs,

Reference 31

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T14:34:08.701843Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

source=pdf_text observed=2026-08-14T14:34:08.661637Z digest=sha256:c8c75442df27a91c3b187eace0b8a9addbce14faa715cc242295d8f83b7519bd

Pith citing papers

No inbound Pith citation observations are available.