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TT-Rec: Tensor Train Compression for Deep Learning Recommendation Models

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arxiv 2101.11714 v1 pith:PDZQMCUS submitted 2021-01-25 cs.LG

classification cs.LG
keywords tt-recaccuracycapacitydesigndlrmstensortimesacross
verification ladder T0 review T1 audit T2 compute T3 formal
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The memory capacity of embedding tables in deep learning recommendation models (DLRMs) is increasing dramatically from tens of GBs to TBs across the industry. Given the fast growth in DLRMs, novel solutions are urgently needed, in order to enable fast and efficient DLRM innovations. At the same time, this must be done without having to exponentially increase infrastructure capacity demands. In this paper, we demonstrate the promising potential of Tensor Train decomposition for DLRMs (TT-Rec), an important yet under-investigated context. We design and implement optimized kernels (TT-EmbeddingBag) to evaluate the proposed TT-Rec design. TT-EmbeddingBag is 3 times faster than the SOTA TT implementation. The performance of TT-Rec is further optimized with the batched matrix multiplication and caching strategies for embedding vector lookup operations. In addition, we present mathematically and empirically the effect of weight initialization distribution on DLRM accuracy and propose to initialize the tensor cores of TT-Rec following the sampled Gaussian distribution. We evaluate TT-Rec across three important design space dimensions -- memory capacity, accuracy, and timing performance -- by training MLPerf-DLRM with Criteo's Kaggle and Terabyte data sets. TT-Rec achieves 117 times and 112 times model size compression, for Kaggle and Terabyte, respectively. This impressive model size reduction can come with no accuracy nor training time overhead as compared to the uncompressed baseline.

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  1. DoTA: Weight-Decomposed Tensor Adaptation for Large Language Models

    cs.CL 2024-12 conditional novelty 5.0 of 10

    Initializing tensor adapters from the MPO decomposition of pretrained weights boosts fine-tuning accuracy and parameter efficiency over random and SVD-based initialization in LLaMA2-7B and LLaMA3-8B.

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