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Measurement-Induced State Transitions in a Superconducting Qubit: Within the Rotating Wave Approximation
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Superconducting qubits typically use a dispersive readout scheme, where a resonator is coupled to a qubit such that its frequency is qubit-state dependent. Measurement is performed by driving the resonator, where the transmitted resonator field yields information about the resonator frequency and thus the qubit state. Ideally, we could use arbitrarily strong resonator drives to achieve a target signal-to-noise ratio in the shortest possible time. However, experiments have shown that when the average resonator photon number exceeds a certain threshold, the qubit is excited out of its computational subspace in a process we refer to as a measurement-induced state transition (MIST). These transitions degrade readout fidelity, and constitute leakage which precludes further operation of the qubit in, for example, error correction. Here we study these transitions experimentally with a transmon qubit by measuring their dependence on qubit frequency, average resonator photon number, and qubit state, in the regime where the resonator frequency is lower than the qubit frequency. We observe signatures of resonant transitions between levels in the coupled qubit-resonator system that exhibit noisy behavior when measured repeatedly in time. We provide a semi-classical model of these transitions based on the rotating wave approximation and use it to predict the onset of state transitions in our experiments. Our results suggest the transmon is excited to levels near the top of its cosine potential following a state transition, where the charge dispersion of higher transmon levels explains the observed noisy behavior of state transitions. Moreover, we show that occupation in these higher energy levels poses a major challenge for fast qubit reset.
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Surface-code Superconducting Quantum Processors: From Calibration To Logical Performance
A compilation of experiments showing that small surface codes on superconducting transmons can realize logical initialization, measurement, and gates, with fault-tolerant variants outperforming non-fault-tolerant ones...
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