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SwiftTron: An Efficient Hardware Accelerator for Quantized Transformers

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arxiv 2304.03986 v2 pith:HJGWX6H6 submitted 2023-04-08 cs.LG

classification cs.LG
keywords swifttrontransformershardwareacceleratorarchitecturecomputationseaseefficient
verification ladder T0 review T1 audit T2 compute T3 formal
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abstract

Transformers' compute-intensive operations pose enormous challenges for their deployment in resource-constrained EdgeAI / tinyML devices. As an established neural network compression technique, quantization reduces the hardware computational and memory resources. In particular, fixed-point quantization is desirable to ease the computations using lightweight blocks, like adders and multipliers, of the underlying hardware. However, deploying fully-quantized Transformers on existing general-purpose hardware, generic AI accelerators, or specialized architectures for Transformers with floating-point units might be infeasible and/or inefficient. Towards this, we propose SwiftTron, an efficient specialized hardware accelerator designed for Quantized Transformers. SwiftTron supports the execution of different types of Transformers' operations (like Attention, Softmax, GELU, and Layer Normalization) and accounts for diverse scaling factors to perform correct computations. We synthesize the complete SwiftTron architecture in a $65$ nm CMOS technology with the ASIC design flow. Our Accelerator executes the RoBERTa-base model in 1.83 ns, while consuming 33.64 mW power, and occupying an area of 273 mm^2. To ease the reproducibility, the RTL of our SwiftTron architecture is released at https://github.com/albertomarchisio/SwiftTron.

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Cited by 1 Pith paper

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score. Full citation record

  1. DeVIT: Low-Power Vision Transformer Acceleration Using Delta Computation

    cs.CV 2026-08 conditional novelty 6.0 of 10

    DeVIT sorts quantized vision transformer weights into a differential chain and reuses the input-by-smallest-weight product, converting most weight multiplications into shift-add operations.

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