Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links
Paper Citation Record · LEDGER
Massively Parallel Tensor Network State Algorithms on Hybrid CPU-GPU Based Architectures
As of 9 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 1 inbound Pith citation observation for arXiv:2305.05581.
A citation records a reference. It does not transfer a finding from one paper to another.
Coverage vector
One-hop event checks from named stored sources.
Source: scholarly_work_events, retraction_status_cache, observed 2026-08-09T06:31:02.800959+00:00
Pith citing papers itemized under the disclosed page cap.
Source: paper_references, paper_reference_links, observed 2026-08-06T13:27:38.377421Z
A source-named dated measurement, never combined with another source.
Source: pith, observed 2026-08-06T18:16:30.548575Z
Reference resolution
0 of 0 outbound references displayed
- verified exact0
- verified fuzzy0
- unresolved0
- parse uncertain0
- malformed identifier0
- metadata mismatch0
External citation measurements
No source-named external measurement is stored.
Outbound references
No outbound reference observations are available for this paper version.
Pith citing papers
Observation b937e849-4858-4616-90ac-a7135a68b292 · inbound
Optimizing Tensor Network Partitioning using Simulated Annealing cites this paper.
Optimizing Tensor Network Partitioning using Simulated Annealing Massively Parallel Tensor Network State Algorithms on Hybrid CPU-GPU Based Architectures
Reference 23
- Resolution
- verified exact
- local_arxiv, observed 2026-08-06T13:27:38.694781Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.