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MG3MConv: Multi-Grained Matrix-Multiplication-Mapping Convolution Algorithm toward the SW26010 Processor

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Zheng Wu

Distributed, Parallel, and Cluster Computing · Submitted 11 Jul 2023

abstract compiled · 2026-09-23 · no language-model review

The authors' main claim The experiments show that the hardware efficiency of MG3MConv can reach 84.78% in max, which is 1.75 times compared with that of cuDNN based on NVIDIA K80m GPU.

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arXiv ID2307.04941 (version 1)
Pith IDG4SAX4MS, Pith's permanent record of this paper and its review
CitationZheng Wu. "MG3MConv: Multi-Grained Matrix-Multiplication-Mapping Convolution Algorithm toward the SW26010 Processor." arXiv:2307.04941 (2023). https://pith.science/paper/G4SAX4MS
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What the abstract itself states, as probabilities: claims first 0.10 · states limitation 0.12 · human participants 0.02 · controlled comparison 0.93 · randomized assignment 0.01 · states quantitative result 0.99 · compares with prior results 0.98 · mentions code or data availability 0.02.

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arXiv listing abstract v1. Results and the main claim are underlined; .

As the core of artificial intelligence applications, the research of convolution has become a hot topic in high performance computing. With the rapid development of the emerging SW26010 processor in artificial intelligence, there is an urgent need for high-performance convolution algorithms on the processor. However, the current support of convolution on SW26010 is still rudimentary. The only studies provide sufficient runtime peak performance but lack the adaptability to various convolution scenes. To perfect convolution algorithms on SW26010, we propose a multi-grained matrix-multiplication-mapping convolution algorithm called MG3MConv, which targets the architectural features of SW26010. MG3MConv supports diversified mapping schemes of convolution tasks based on the concept of the thread block proposed in this paper. All the architecture-oriented optimization methods are elaborately designed from four levels to fully exploit the hardware efficiency of SW26010. The experiments show that the hardware efficiency of MG3MConv can reach 84.78% in max, which is 1.75 times compared with that of cuDNN based on NVIDIA K80m GPU. Moreover, MG3MConv can overperform cuDNN in most convolution scenes. We also use six representative CNNs as real-world cases, and the hardware efficiency of MG3MConv reaches up to 67.04% on the VGG network model, which is 1.37 times and 1.96 times that of cuDNN and swDNN, respectively.

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What the classifier reports for each sentence. The number is the probability it gave the label.
#sentencerolethe authors' own workstates the main conclusionstrength
s0 As the core of artificial intelligence applications, the research of convolution has become a hot topic in high performance computing. background 1.00 0.04 0.02 asserted 1.00
s1 With the rapid development of the emerging SW26010 processor in artificial intelligence, there is an urgent need for high-performance convolution algorithms on the processor. background 0.93 0.05 0.03 asserted 0.99
s2 However, the current support of convolution on SW26010 is still rudimentary. gap 0.93 0.07 0.02 asserted 1.00
s3 The only studies provide sufficient runtime peak performance but lack the adaptability to various convolution scenes. gap 0.99 0.08 0.02 asserted 1.00
s4 To perfect convolution algorithms on SW26010, we propose a multi-grained matrix-multiplication-mapping convolution algorithm called MG3MConv, which targets the architectural features of SW26010. contribution 0.98 0.91 0.14 asserted 0.99
s5 MG3MConv supports diversified mapping schemes of convolution tasks based on the concept of the thread block proposed in this paper. method 0.68 0.85 0.07 asserted 1.00
s6 All the architecture-oriented optimization methods are elaborately designed from four levels to fully exploit the hardware efficiency of SW26010. method 0.90 0.83 0.06 asserted 1.00
s7 The experiments show that the hardware efficiency of MG3MConv can reach 84.78% in max, which is 1.75 times compared with that of cuDNN based on NVIDIA K80m GPU. result 1.00 0.96 0.38 asserted 1.00
s8 Moreover, MG3MConv can overperform cuDNN in most convolution scenes. result 0.98 0.90 0.23 asserted 0.99
s9 We also use six representative CNNs as real-world cases, and the hardware efficiency of MG3MConv reaches up to 67.04% on the VGG network model, which is 1.37 times and 1.96 times that of cuDNN and swDNN, respectively. result 1.00 0.96 0.23 asserted 1.00

What kind of paper the classifier reports this is: method or tool 1.00 · evidence from observation or experiment 0.97.

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  • P abstract
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  • S sections
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  • C citations
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Every quoted sentence on this record is the authors'. Every label is from Pith's closed vocabulary, with the probability shown beside it. Every number in the measurements table is the authors', checked by code. Record as JSON

The paper
Original abstract

As the core of artificial intelligence applications, the research of convolution has become a hot topic in high performance computing. With the rapid development of the emerging SW26010 processor in artificial intelligence, there is an urgent need for high-performance convolution algorithms on the processor. However, the current support of convolution on SW26010 is still rudimentary. The only studies provide sufficient runtime peak performance but lack the adaptability to various convolution scenes. To perfect convolution algorithms on SW26010, we propose a multi-grained matrix-multiplication-mapping convolution algorithm called MG3MConv, which targets the architectural features of SW26010. MG3MConv supports diversified mapping schemes of convolution tasks based on the concept of the thread block proposed in this paper. All the architecture-oriented optimization methods are elaborately designed from four levels to fully exploit the hardware efficiency of SW26010. The experiments show that the hardware efficiency of MG3MConv can reach 84.78% in max, which is 1.75 times compared with that of cuDNN based on NVIDIA K80m GPU. Moreover, MG3MConv can overperform cuDNN in most convolution scenes. We also use six representative CNNs as real-world cases, and the hardware efficiency of MG3MConv reaches up to 67.04% on the VGG network model, which is 1.37 times and 1.96 times that of cuDNN and swDNN, respectively.

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Each citing sentence is taken from the citing paper's LaTeX source and typed by Pith's classifier. A label appears at probability 0.8 or more (0.95 for support), a contest at 0.7 or more; the quoted words are the citing authors'. How each label was checked · JSON

What it cites

Cites as background 2 papers
  • Many studies are devoted to improving the performance of convolution on GPUs [ref] and CPUs [ref] , which has promoted the perfection of deep neural network libraries such as NVIDIA cuDNN [ref] and Intel MKL-DNN [ref] .

    cuDNN: Efficient Primitives for Deep Learning · Introduce · 0.84

  • FFT-based convolution [ref] converts the input and filter into the frequency domain space, completes those matrix multiplications [ref] , and converts the result back into the time domain space to get the final convolutional result.

    Fast Training of Convolutional Networks through FFTs · Related work · 0.82

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