Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links
Paper Citation Record · LEDGER
Hardware-aware training of models with synaptic delays for digital event-driven neuromorphic processors
As of 23 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 1 inbound Pith citation observation for arXiv:2404.10597.
A citation records a reference. It does not transfer a finding from one paper to another.
Coverage vector
One-hop event checks from named stored sources.
Source: scholarly_work_events, retraction_status_cache, observed 2026-08-23T06:30:58.430688+00:00
Pith citing papers itemized under the disclosed page cap.
Source: paper_references, paper_reference_links, observed 2026-05-17T00:52:21.145273Z
A source-named dated measurement, never combined with another source.
Source: arxiv_reference, observed 2026-05-17T00:53:46.157034Z
Reference resolution
0 of 0 outbound references displayed
- verified exact0
- verified fuzzy0
- unresolved0
- parse uncertain0
- malformed identifier0
- metadata mismatch0
External citation measurements
No source-named external measurement is stored.
Outbound references
No outbound reference observations are available for this paper version.
Pith citing papers
Observation 739da90c-d9a2-4b41-a23b-fc6667fcd36a · inbound
Algorithm-hardware co-design of neuromorphic networks with dual memory pathways cites this paper.
Algorithm-hardware co-design of neuromorphic networks with dual memory pathways Hardware-aware training of models with synaptic delays for digital event-driven neuromorphic processors
Reference 26
- Resolution
- verified exact
- arxiv_id, observed 2026-05-17T00:53:46.159807Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-23T06:30:58.430688+00:00.