Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links
Paper Citation Record · LEDGER
Demonstrating a universal logical gate set in error-detecting surface codes on a superconducting quantum processor
As of 6 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 2 inbound Pith citation observations for arXiv:2405.09035.
A citation records a reference. It does not transfer a finding from one paper to another.
Coverage vector
One-hop event checks from named stored sources.
Source: scholarly_work_events, retraction_status_cache, observed 2026-08-06T06:34:29.942622+00:00
Pith citing papers itemized under the disclosed page cap.
Source: paper_references, paper_reference_links, observed 2026-08-02T16:14:51.032656Z
A source-named dated measurement, never combined with another source.
Source: arxiv_reference, observed 2026-05-10T12:00:22.005475Z
Reference resolution
0 of 0 outbound references displayed
- verified exact0
- verified fuzzy0
- unresolved0
- parse uncertain0
- malformed identifier0
- metadata mismatch0
External citation measurements
No source-named external measurement is stored.
Outbound references
No outbound reference observations are available for this paper version.
Pith citing papers
Observation 9c8bc262-6480-4c63-a3be-d01b0b4201c4 · inbound
Hybrid physical/logical zero-noise extrapolation with limited logical executions cites this paper.
Hybrid physical/logical zero-noise extrapolation with limited logical executions Demonstrating a universal logical gate set in error-detecting surface codes on a superconducting quantum processor
Reference 9
- Resolution
- verified exact
- arxiv_id, observed 2026-05-10T12:00:22.007535Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.
Observation 2b6866ea-e9a3-41bb-9a19-9dfe43d9347c · inbound
Hybrid physical/logical zero-noise extrapolation with limited logical executions cites this paper.
Hybrid physical/logical zero-noise extrapolation with limited logical executions Demonstrating a universal logical gate set in error-detecting surface codes on a superconducting quantum processor
Reference 1
- Resolution
- unresolved
- no resolver link, observed 2026-08-02T16:14:51.032656Z
Source-reported events for the cited work
Unavailable: canonical work link unavailable.