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Verification of Quantum Circuits through Discrete-Time Barrier Certificates

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arxiv 2408.07591 v1 pith:RFMF5U2B submitted 2024-08-14 quant-ph cs.LOcs.SYeess.SY

classification quant-phcs.LOcs.SYeess.SY
keywords quantumcircuitsbarriercertificatescomputersdynamicalpropertiesverification
verification ladder T0 review T1 audit T2 compute T3 formal
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Current methods for verifying quantum computers are predominately based on interactive or automatic theorem provers. Considering that quantum computers are dynamical in nature, this paper employs and extends the concepts from the verification of dynamical systems to verify properties of quantum circuits. Our main contribution is to propose k-inductive barrier certificates over complex variables and show how to compute them using Hermitian Sum of Squares optimization. We apply this new technique to verify properties of different quantum circuits.

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Cited by 1 Pith paper

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score. Full citation record

  1. Verification of Quantum Circuits through Barrier Certificates using a Scenario Approach

    cs.LO 2025-06 conditional novelty 4.0 of 10

    A sampling-plus-LP pipeline synthesizes barrier certificates for quantum circuits and SMT-verifies them over continuous state spaces, for finite or infinite horizons with uncertainty.

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