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REVIEW 4 major objections 6 minor 2 cited by

Harnessing CUDA-Q's MPS for Tensor Network Simulations of Large-Scale Quantum Circuits

T0 review · 4 major / 6 minor · reviewed 2026-08-10 · deepseek-v4-flash

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Pith's one-line read CUDA-Q's matrix-product-state simulator runs 60-qubit circuits on a single GPU, where state-vector simulation cannot fit any existing system.

desk verdict A solid single-GPU benchmark of CUDA-Q MPS with useful runtime data, but the 60-qubit result is runtime-only; accuracy is validated for one 10-qubit circuit. read the letter →

arxiv 2501.15939 v1 pith:B62V7YIR submitted 2025-01-27 quant-ph cs.DC

Gabin Schieffer , Stefano Markidis , Ivy Peng This is my paper · ORCID
classification quant-phcs.DC
keywords quantumcircuitsimulationmatrixproductstatetensornetworksGPUaccelerationCUDA-Qbonddimensionvectorentanglementratio
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

This paper claims that approximate matrix-product-state (MPS) simulation, as implemented in CUDA-Q, can push quantum-circuit simulation far beyond the state-vector ceiling on a single GPU. On a 96 GB GPU the authors run all four main benchmark circuits—GHZ, quantum Fourier transform, quantum volume, and QAOA—at 60 qubits, and GHZ out to 90 qubits, while state-vector simulation of those circuits would not fit on any currently existing system. The reason is that MPS memory and runtime scale with the circuit's entanglement rather than with the full $2^n$ state; the measured runtime grows linearly for QFT and GHZ and as a power law for QAOA and quantum volume, not exponentially. Because MPS truncates singular values, the results are approximate, and the paper validates on a 10-qubit QAOA circuit that the four most likely measurement outcomes survive down to a bond dimension of 16. A sympathetic reader would take away that large-qubit classical simulation on a single GPU is realistic for low-entanglement algorithms, with accuracy the price and the main remaining risk.

What carries the argument

The load-bearing object is the matrix product state (MPS), a tensor network shaped as a chain of tensors in which each qubit corresponds to one tensor and adjacent tensors share a bond of dimension $\chi$. Starting from a full state tensor, repeated singular value decompositions produce the MPS, and truncating singular values—here capped at max bond 64 with absolute and relative cutoffs of $10^{-5}$—yields a compact approximation whose memory cost is $d n \chi^2$, only linear in the number of qubits $n$ for fixed $\chi$. The same SVD truncation is what both enables large-qubit simulation and limits accuracy, since $\chi$ must be large enough to capture the circuit's entanglement. The paper uses the entanglement ratio (two-qubit gates over total gates) to characterize circuits and finds constant asymptotic ratios between 0.25 and 1.0 across the five benchmarks, which lets it connect circuit structure to MPS scalability.

What would settle it

Run the same CUDA-Q MPS implementation on a 20- to 30-qubit version of each test circuit with the default max bond 64 and compare the sampled outcome distribution to an exact state-vector simulation; if the four most likely outcomes do not match the exact reference for any of the circuits, the default approximation is already untrustworthy at small scale, so the 60-qubit results would require a larger bond dimension that may not fit on the GPU. A cleaner test is to increase the max bond from 64 to, say, 256 at 60 qubits for one circuit: if the top outcomes change materially, the reported 60-qubit feasibility is not accompanied by stable results.

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Extended reading notes

Core claim

The central discovery is that MPS simulation on a single GPU is able to simulate 60-qubit circuits in all evaluated scenarios, and 90 qubits for the GHZ circuit, whereas state-vector simulation would not be able to execute any of those simulations on any currently existing system. The paper establishes this empirically on a test system with 96 GB of GPU memory: state-vector simulation supports up to 33 qubits, while MPS reaches 60 qubits for QAOA, quantum volume, QFT, and GHZ, and 90 for GHZ. Runtime scaling in the high-qubit regime is either linear in the number of qubits (QFT, GHZ) or a power law $t = \alpha n^\beta$ (QAOA, quantum volume), in contrast to the exponential cost of state-vector simulation. The paper also shows that for qubit counts below about 12, state-vector simulation is faster, and that the SVD phase dominates MPS execution (about 70% of runtime) while leaving the GPU only about a third utilized. Correctness is checked on a 10-qubit QAOA circuit, where the four most probable sampled states match the state-vector reference down to bond dimension 16.

Load-bearing premise

The load-bearing premise is that the five benchmark circuits represent real quantum workloads well enough in entanglement structure; if a real target algorithm is more entangled, the fixed bond dimension of 64 will either produce wrong answers or require a bond dimension too large for a single GPU, and the 60-qubit feasibility claim will not carry over.

Editorial extensions

If this is right

  • A 96 GB single GPU can simulate 60-qubit versions of low-entanglement circuits, and 90-qubit GHZ, where no currently existing system could execute those as state-vector simulations.
  • For these circuits the per-shot MPS runtime grows linearly or polynomially with qubit count, so the practical limit is set by circuit structure rather than by the exponential state size.
  • State-vector simulation remains the right choice below roughly 12 to 13 qubits; tensor-network and MPS backends only win when the state vector no longer fits in memory.
  • Approximation is controllable through the bond dimension: the default max bond 64 preserved the top four QAOA outcomes, the top outcomes were still intact at bond 16, and they dropped to at most two matches at bond 8 or below.
  • GPU profiling shows the SVD phase dominates MPS time but under-utilizes the GPU, with about 33% average activity and less than 1% Tensor Core utilization, meaning current MPS implementations leave headroom for optimization.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • The paper's five benchmarks all have bounded entanglement ratios, so the 60-qubit result should be read as "low-entanglement circuits," not as a general license: any real workload with volume-law entanglement will require a larger bond dimension and will eventually hit a memory wall, only at a different height.
  • The correctness check at 10 qubits does not by itself certify the 60-qubit outputs; a practical user should verify stability of top outcomes with respect to bond dimension on the target circuit before trusting a large MPS run.
  • Because each shot in MPS costs a fresh contraction, the method is most attractive when the number of samples is modest or when approximate samples can drive an outer optimization loop, as in variational algorithms; the paper notes but does not test this use.
  • If the GPU under-utilization seen in profiling is fixed, the constants in the runtime fits would improve substantially without changing the scaling laws, with the largest benefit going to the SVD-dominated MPS path.
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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

4 major / 6 minor

Summary. This paper evaluates CUDA-Q's matrix product state (MPS) and exact tensor network simulators on an NVIDIA Grace Hopper system, comparing them with the state vector backend for five circuits (GHZ, QFT, Quantum Volume, QAOA, and counterfeit coin). The authors measure runtime scaling from low qubit counts up to 60 qubits for four circuits and 90 qubits for GHZ, report that MPS runtime scales linearly or polynomially while state vector runtime scales exponentially, and profile MPS and tensor network executions to show that SVD iterations dominate and under-utilize the GPU. They also propose a correctness validation approach based on comparing the most likely sampled outcomes against state vector results for a single 10-qubit QAOA circuit with varying bond dimension limits.

Significance. The runtime measurements are credible and the public benchmark repository (Ref. [13]) is a valuable resource. The paper's main contribution, demonstrating that a single GPU can execute MPS simulations of 60-qubit circuits for four common circuit families, is directly supported by the wall-clock data. The honest discussion of limitations (the unverified 12-to-13 qubit gap, the application-dependence of the number of relevant outcomes, and the inability to identify the role of CPU-side tasks) is commendable. However, the significance of the headline claim is weakened by the absence of any accuracy validation at large n: the only correctness check is for one 10-qubit circuit, and the entanglement-ratio metric is never quantitatively linked to MPS truncation error. As a result, the paper establishes runtime feasibility but not that the large-scale simulations are accurate.

major comments (4)
  1. [Section IV-B, Fig. 5] The claim that "MPS simulation is able to simulate 60-qubit circuits in all evaluated scenarios on a single GPU" is supported only by wall-clock runtime measurements; no accuracy check is reported for n ≥ 35. The only correctness validation (Section V) is a single 10-qubit QAOA instance with random parameters. Because MPS is approximate, a simulation that completes quickly may return an arbitrarily inaccurate distribution. The paper should either provide fidelity or truncation-error estimates at large n, or explicitly restrict the claim to runtime feasibility.
  2. [Section III-A and Section V] The default MPS parameters (CUDAQ_MPS_MAX_BOND=64, absolute and relative cutoffs 1e-5) are used throughout, and the correctness experiment shows that for one 10-qubit QAOA instance the top-4 outcomes are preserved down to χmax=16. This does not establish that χmax=64 is sufficient for QFT, QV, or QAOA at 60 qubits, where the required bond dimension depends on the entanglement structure and can grow with depth. The paper should report convergence checks (e.g., varying χmax at intermediate sizes or computing singular value spectra) to bound the approximation error.
  3. [Section V-B, Table III] The correctness assessment is restricted to the four most probable states from one instance, with no quantitative measure such as fidelity, total variation distance, or statistical confidence. The paper itself notes that the number of relevant outcomes is application-dependent. This is too narrow a basis for generalizing correctness to the large-scale simulations. A more robust validation (e.g., multiple circuits, varying sizes, and a proper distance metric) is needed.
  4. [Section IV-B, Fig. 5] The scaling "models" are empirical fits (t = αn^β, t = an+b) with parameters estimated from the measured data; calling this "analytically model[ing] the scalability" in the contribution list overstates the contribution. The fits have no uncertainty quantification, and the extrapolation of state vector runtime beyond the measured range relies on the exponential fit. The memory argument alone suffices to show state vector infeasibility at 60 qubits; the fitting language should be corrected.
minor comments (6)
  1. [Section III-B, Fig. 3] The legend spells "Couterfeit Coin" instead of "Counterfeit Coin"; the typo should be corrected.
  2. [Section IV-A] The performance gap from 12 to 13 qubits is speculatively attributed to "cache" or "a change of behavior of the simulator," and the authors state they could not verify it in documentation; this should be presented as an unresolved observation rather than a conclusion.
  3. [Section III-B] The statement that "This property would allow us to correlate this metric with tensor network simulation performance" is not followed by any actual correlation analysis; either add such an analysis or remove the implication.
  4. [Section IV-C2] The suggestion that CPU-side tasks are "ill-suited for GPU parallelization" is not directly evidenced by the profiling; it should be clearly presented as a hypothesis.
  5. [Section V-B, Table III] The table caption mentions "Green color" but the table may render in grayscale; ensure that the color coding is visible in print.
  6. [Section II-B] The expression "the number of parameters to represent a tensor network is dnχ²" is stated without specifying that it applies to an MPS; clarify that n is the number of qubits and the expression is for a fixed bond dimension.

Circularity Check

0 steps flagged · score 0.0 of 10

No significant circularity: the runtime and correctness results are measured against independent baselines, not derived from assumptions containing the conclusions.

full rationale

The paper's central claims are empirical. The 60-qubit MPS feasibility statement is a direct runtime observation (Section IV-B, Fig. 5), and the scaling laws t = α n^β and t = a n + b are fits to measured data, not predictions derived from the inputs; the state-vector 'projected runtime' is an extrapolation of observed exponential cost and is not used to define the MPS result. Correctness of MPS is validated against an independent exact state-vector reference on a 10-qubit QAOA instance (Section V-A), and the truncation-parameter study in Section V-B directly measures the effect of χ_max against that reference. Self-citations (refs [3], [8], [11], [15]) appear only in background, related-work, and a hardware-capacity statement; none carries the load of the MPS feasibility or accuracy claims. The paper itself limits correctness validation to a single small circuit, stating 'In this section, we focus on a single 10-qubit QAOA circuit' (Section V), which is an acknowledged validation gap for the high-qubit runs, not a circularity, since those runs are reported as runtime and approximate simulations rather than as results derived from the 10-qubit check. No equation or fitted parameter is defined in terms of the claim it supports, so no circular step can be exhibited.

Assumptions & free parameters 5 free parameters · 4 assumptions · 0 invented entities

The central claims rest on standard tensor network theory and empirical fit constants, plus a representative-circuit assumption. No new physical entities are introduced.

free parameters (5)
  • QAOA power-law exponent and coefficient = alpha = 0.0017, beta = 3.1644
    Fit to MPS runtime for QAOA circuits in Figure 5a; used to claim power-law scaling.
  • Quantum Volume power-law exponent and coefficient = alpha = 0.0008, beta = 3.5786
    Fit to MPS runtime for quantum volume circuits in Figure 5a.
  • QFT linear-fit slope and intercept = a = 5.53, b = -155.16
    Fit to MPS runtime for QFT circuits in Figure 5b.
  • GHZ linear-fit slope and intercept = a = 2.11, b = -50.82
    Fit to MPS runtime for GHZ circuits in Figure 5b.
  • State-vector exponential fit constants = 2E-10 exp(0.742 n) for QAOA/QV, 2E-10 exp(0.6867 n) for QFT
    Exponential curves used to project state vector runtime under infinite memory; these are fits to measured low-qubit runtimes, not analytical expressions.
assumptions (4)
  • standard math MPS memory requirement for n qubits with bond dimension chi is 2 n chi^2 complex values (Section II-B).
    Standard tensor network result, cited to [14]; used to argue linear memory scaling.
  • standard math State vector simulation requires 2^n complex values (Section II-B).
    Standard result; used as the baseline for why state vector fails beyond 33 qubits.
  • domain assumption Entanglement ratio (fraction of two-qubit gates) is a proxy for computational cost of tensor network simulation (Section III-B).
    The paper defines this ratio following SupermarQ [20] and states it 'loosely characterizes the level of entanglement,' but does not establish a quantitative link to MPS runtime; the later sections never actually correlate the ratio with measured performance.
  • ad hoc to paper Default MPS parameters (max bond 64, cutoff 1e-5) are sufficient to produce correct results for the evaluated circuits (Section III-A, V).
    The correctness validation shows the default works for one QAOA instance, but the paper does not justify using these defaults across all five circuits; this is a configuration choice, not a derived condition.

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Cite this review

Pith. "Pith review of Harnessing CUDA-Q's MPS for Tensor Network Simulations of Large-Scale Quantum Circuits." pith.science (2026). https://pith.science/paper/B62V7YIR

@misc{pith2026250115939,
  author       = {Pith},
  title        = {Pith review of: Harnessing CUDA-Q's MPS for Tensor Network Simulations of Large-Scale Quantum Circuits},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/B62V7YIR}},
  note         = {Machine review of arXiv:2501.15939}
}
read the original abstract

Quantum computer simulators are an indispensable tool for prototyping quantum algorithms and verifying the functioning of existing quantum computer hardware. The current largest quantum computers feature more than one thousand qubits, challenging their classical simulators. State-vector quantum simulators are challenged by the exponential increase of representable quantum states with respect to the number of qubits, making more than fifty qubits practically unfeasible. A more appealing approach for simulating quantum computers is adopting the tensor network approach, whose memory requirements fundamentally depend on the level of entanglement in the quantum circuit, and allows simulating the current largest quantum computers. This work investigates and evaluates the CUDA-Q tensor network simulators on an Nvidia Grace Hopper system, particularly the Matrix Product State (MPS) formulation. We compare the performance of the CUDA-Q state vector implementation and validate the correctness of MPS simulations. Our results highlight that tensor network-based methods provide a significant opportunity to simulate large-qubit circuits, albeit approximately. We also show that current GPU-accelerated computation cannot fully utilize GPU efficiently in the case of MPS simulations.

Figures

Figures reproduced from arXiv: 2501.15939 by the authors.

Figure 1
Figure 1. A quantum circuit creating an entangled bell state (left), [PITH_FULL_IMAGE:figures/full_fig_p002_1.png] view at source ↗
Figure 2
Figure 2. Tensor network representation of a matrix product state [PITH_FULL_IMAGE:figures/full_fig_p002_2.png] view at source ↗
Figure 3
Figure 3. The number of gates (a) and entanglement ratios (b) of [PITH_FULL_IMAGE:figures/full_fig_p004_3.png] view at source ↗
Figures from the paper (5 more)
Figure 4
Figure 4. Figure 4: Runtime for increasing number of qubits for each circuit, simulation using state vector (SV), approximate matrix product [PITH_FULL_IMAGE:figures/full_fig_p006_4.png]
Figure 5
Figure 5. Figure 5: Runtime measurements for the four circuits, with qubit [PITH_FULL_IMAGE:figures/full_fig_p006_5.png]
Figure 6
Figure 6. Figure 6: Profiling of the computational phase, obtained with [PITH_FULL_IMAGE:figures/full_fig_p007_6.png]
Figure 7
Figure 7. Figure 7: Profiling of the contraction part of the quantum [PITH_FULL_IMAGE:figures/full_fig_p007_7.png]
Figure 8
Figure 8. Figure 8: Distribution of measurements for a 100,000-shot sim [PITH_FULL_IMAGE:figures/full_fig_p008_8.png]

Discussion (0). Continue with ORCID to comment.

Forward citations

Cited by 2 Pith papers

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score. Full citation record

  1. Benchmarking Zero-Setup Quantum Circuit Simulators

    quant-ph 2026-07 conditional novelty 5.5 of 10

    GPU-accelerated zero-setup simulators show sub-quadratic MPS bond-dimension scaling and up to 1,400× PPS speedups, uniquely reaching fine truncation accuracy on the 127-qubit kicked Ising circuit.

  2. Intelligence-Guided Adaptive Purification for DDoS-Resilient Quantum Networks: A CUDA-Q based Study

    quant-ph 2026-07 conditional novelty 5.0 of 10

    IDS-driven adaptive purification in a simulated 8-node quantum repeater chain restores fidelity-qualified entanglement delivery under SSDP-induced degradation (0.098 to 0.344 above-target; oracle 0.335).

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