Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links
Paper Citation Record · LEDGER
ReasoningV: Efficient Verilog Code Generation with Adaptive Hybrid Reasoning Model
As of 9 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 1 inbound Pith citation observation for arXiv:2504.14560.
A citation records a reference. It does not transfer a finding from one paper to another.
Coverage vector
One-hop event checks from named stored sources.
Source: scholarly_work_events, retraction_status_cache, observed 2026-08-09T06:31:02.800959+00:00
Pith citing papers itemized under the disclosed page cap.
Source: paper_references, paper_reference_links, observed 2026-07-30T20:17:57.534211Z
A source-named dated measurement, never combined with another source.
Source: pith, observed 2026-08-05T02:28:24.338817Z
Reference resolution
0 of 0 outbound references displayed
- verified exact0
- verified fuzzy0
- unresolved0
- parse uncertain0
- malformed identifier0
- metadata mismatch0
External citation measurements
0
pith, observed 2026-08-05T02:28:24.338817Z
Outbound references
No outbound reference observations are available for this paper version.
Pith citing papers
Observation ab264b57-c66b-48a5-9a84-c052cb2bdc36 · inbound
CircuitWeave: Topology-Behavior Alignment for Executable Multimodal RTL Generation cites this paper.
CircuitWeave: Topology-Behavior Alignment for Executable Multimodal RTL Generation ReasoningV: Efficient Verilog Code Generation with Adaptive Hybrid Reasoning Model
Reference 15
- Resolution
- verified exact
- local_arxiv, observed 2026-07-30T20:20:56.685455Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.