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Scalable Parallel Single-Electron Pumps in Silicon with Split-Source Control in the Nanoampere Regime

T0 review · 2 major / 4 minor · reviewed 2026-08-16 · deepseek-v4-flash

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Pith's one-line read Four parallel silicon single-electron pumps, each with its own source electrode, can be tuned independently and their stacked currents exceed 2 nA.

desk verdict Split-source control is a genuinely useful new knob for parallelizing silicon TSEPs, and the >2 nA stacked plateau is a first, but the accuracy at that current is unmeasured, so the metrology claims outrun the data. read the letter →

arxiv 2504.17273 v1 pith:MIBOFBBP submitted 2025-04-24 cond-mat.mes-hall

Gento Yamahata , Takase Shimizu , Katsuhiko Nishiguchi , Akira Fujiwara This is my paper · ORCID
classification cond-mat.mes-hall
keywords single-electronpumptunablebarriersiliconquantumdotparallelizationsplit-sourceelectrodenanoamperecurrentstandarddynamiccapture
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

This paper claims that the obstacle to parallelizing single-electron pumps—each pump wants slightly different voltage settings—can be removed by giving every pump its own source electrode and tuning those source voltages independently. Using silicon tunable-barrier single-electron pumps, devices that transfer one electron per clock cycle, the authors operate four pumps in parallel at 200 MHz and stack four $ef$ plateaus into a single $4ef$ current. At 2.1 GHz they stack the $ef$, $2ef$, and $3ef$ plateaus of three pumps and reach currents above 2 nA, an output that would require a single pump running at roughly 12.6 GHz. Reaching the nanoampere range matters because current measurement accuracy degrades as current falls, and a quantum current standard needs accurate current in exactly this range.

What carries the argument

The load-bearing object is the split-source electrode: an array of eight silicon pumps shares the entrance gate, exit gate, and drain, but each pump has its own source terminal $S_n$ with an independent DC voltage $V_{Sn}$. The theory used here is dynamic capture: as the entrance barrier rises, the quantum-dot level crosses the source Fermi level, and the electron either tunnels back to the source or is captured; the source voltage sets where that crossing happens, hence the escape rate $\Gamma_1$ and the capture probability $P_1$. The paper takes the analytical form $P_1 = \exp[-\exp(\cdots)]$ for the capture probability from Ref. [33]; its level lines in the $(V_{Sn}, V_{\mathrm{exit}})$ plane give the slanted dynamic-capture boundary observed in the current maps. That boundary is the tuning handle: fixing the first pump's optimum from the log-deviation curve, then sweeping the next pump's $V_{Sn}$ while reading $\log_{10}|m - I_{\mathrm{pump}}/ef|$ for the stacked level $m$, selects each pump's operating point in order.

What would settle it

Compare the plateau current of the three-pump 2.1 GHz stack against an independent current reference and check the deviation from the ideal $6ef$ (about 2.018 nA); a deviation far above the sub-0.1 ppm target, or a plateau that is not flat when each source voltage is individually swept, would show that plateau flatness does not certify accuracy.

Watch

Extended reading notes

Core claim

The central discovery is that a single split-source electrode per pump is enough to give each parallel tunable-barrier single-electron pump independent, high-precision tuning. In these silicon devices the source voltage shifts the Fermi level of the source relative to the rising quantum-dot level, which changes the escape rate during dynamic capture; a more positive source voltage lowers the Fermi level, makes the capture decision happen earlier, increases back-tunneling, and lowers the probability of capturing one electron. That makes the source voltage both a switch, since a large positive bias disables a pump, and a trimmer, since small adjustments set each pump exactly on its optimal $ef$ plateau. With this control the authors sequentially tune four pumps at 200 MHz to produce a $4ef$ plateau, and three pumps at 2.1 GHz to produce $ef+2ef+3ef$ current exceeding 2 nA.

Load-bearing premise

The load-bearing premise is that the flat stacked plateaus—especially the >2 nA plateau at 2.1 GHz—represent accurate current at the metrology level; the paper reports an error estimate near one part in a thousand only for two pumps at 200 MHz and does not quantify how far the 2 nA plateau deviates from its ideal value.

Editorial extensions

If this is right

  • Current scales by adding pumps rather than raising frequency: four pumps at 200 MHz already form a clean $4ef$ plateau.
  • Nanoampere output is reached at a modest clock frequency: three pumps at 2.1 GHz deliver what a single pump would need about 12.6 GHz to supply.
  • The tuning protocol is sequential and scalable: each new pump's source voltage is optimised against the already-stacked current, so the number of tuning steps grows with the number of pumps.
  • If the individual pumps reach sub-0.1 ppm accuracy, the same control scheme yields a metrology-ready current source in the nanoampere range.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • The authors leave implicit that source and exit-gate controls move different boundaries, so the two-dimensional current maps can serve as a lookup table for programming arbitrary integer stacks $mef$ per pump, not only $1ef$ each.
  • A testable extension is to close the loop: read the combined current and feed small corrections back to individual source voltages, turning the manual sequential tuning into a self-calibrating array that tracks drift.
  • Because the analytical capture-probability expression ties the boundary slope to capacitive-coupling ratios, measuring that slope across many devices would show whether the required source-voltage trim is predictable from layout, a useful input for designing much larger arrays.
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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

2 major / 4 minor

Summary. The paper proposes and demonstrates a parallelization scheme for tunable-barrier single-electron pumps (TSEPs) in silicon, in which each pump has its own source electrode so that individual source voltages can be used to tune the dynamic-capture condition of each device. The authors show, at 200 MHz, that they can sequentially activate and optimize up to four parallel TSEPs and stack four ef plateaus into a 4ef current. They then operate three TSEPs at 2.1 GHz and report a stacked current plateau exceeding 2 nA (ef + 2ef + 3ef). The central claim is that split-source control provides a scalable and practical route to nanoampere-level current generation toward quantum current standard applications.

Significance. If the central claim holds, the split-source control scheme is a genuine practical advance: it allows independent tuning of parallel TSEPs with only one additional electrode per pump and no change to the shared entrance/exit gates. The experimental data in Figs. 2-4 clearly demonstrate controllable sequential activation, and the observed stacked plateaus up to 4ef at 200 MHz and exceeding 2 nA at 2.1 GHz are notable relative to prior parallel-pump demonstrations. The paper also benefits from a clean device concept and a straightforward tuning protocol. However, the metrology-oriented significance, which is emphasized in the abstract, hinges on the accuracy of the nanoampere-level plateaus, and the paper does not yet provide a quantitative accuracy or uncertainty assessment for the 2 nA plateau.

major comments (2)
  1. [Fig. 4d and surrounding text] The central claim of a current plateau exceeding 2 nA is not quantitatively validated. The only accuracy quantification in the paper is the two-pump, 200 MHz measurement shown in Figs. 2d and 2e, where the combined accuracy is reported as approximately 10^-3. For the 2.1 GHz three-pump stack in Fig. 4d, no deviation from the ideal 6ef value, no uncertainty bars, and no integration-time or offset-subtraction information are provided. Since the abstract and conclusions explicitly connect this result to a path toward high-accuracy quantum current standards, the authors should either (i) provide a calibrated measurement of Ipump at the center of the 2 nA plateau, with a stated integration time and an uncertainty budget, or (ii) explicitly state that the accuracy at 2 nA has not yet been assessed and adjust the metrological claim accordingly.
  2. [Fig. 4d and Sec. 2] The 2 nA plateau stacks ef + 2ef + 3ef contributions, so the accuracy of the individual multi-electron plateau from a single TSEP at 2.1 GHz is directly load-bearing for the claim. The paper provides no error-rate data for the 3ef plateau of any TSEP at 2.1 GHz. The statement in Sec. 2 that an ef + ef combination is expected to be more accurate than a single 2ef plateau does not apply to a 3ef plateau from one device, where multi-electron capture errors enter directly. Please quantify the deviation from the ideal 3ef value for the constituent TSEP, or temper the claim that the stacked 2 nA plateau is a path to high-precision current standards.
minor comments (4)
  1. [Supporting Information, 'Analytical Expression of the Pump Current'] The analytical expression for the dynamic-capture boundary contains an unspecified constant and parameters (αe, αeB, αs, αsB, g, EC) that are not extracted from the present data. The paper states that the boundary slope 'is determined by the ratio of the prefactors' but does not quantitatively compare the predicted slope with the dashed line in Fig. 2a. Please either provide this comparison or explicitly state that the model is used only qualitatively.
  2. [Sec. 3, near Fig. 3d] The sentence 'the limitation of the parallelization is only the number of TSEPs that can be integrated at once' is too strong given that the demonstration uses four TSEPs. Effects such as high-frequency line loading, gate cross-coupling, and device inhomogeneity could limit scaling; suggest rewording to indicate that the design is in principle extendable.
  3. [Sec. 2, Figs. 2d and 2e] The definition of 'accuracy' (approximately 10^-3 and about 10^-5) is not stated. Please specify whether this is |1 - Ipump/(ef)| or |2 - Ipump/(ef)|, and describe how it was measured, including integration time and number of repetitions.
  4. [Supporting Information, 'Measurement Setup'] The floating of the S5 terminal due to a current leak is described only in the Supporting Information. Since Figs. 3 and 4 use a subset of TSEPs, the main text should state which terminals were active and that the floating S5 did not contribute to the measured currents, so that readers can interpret the four-pump and three-pump data without reading the supplement.

Circularity Check

0 steps flagged · score 0.0 of 10

No significant circularity: the central results are direct experimental demonstrations, and the self-cited analytical model is used only for qualitative interpretation.

full rationale

The paper's central claims—parallel operation of four TSEPs at 200 MHz and a stacked current plateau above 2 nA from three TSEPs at 2.1 GHz—are direct ammeter measurements of current plateaus, not predictions derived from a fitted model. The tuning procedure in Figs. 2d–2e uses deviation-from-ideal plots to locate operating points, but the resulting plateaus are then measured, not inferred from those fits. The analytical capture-probability expression in the Supporting Information is taken from Ref. 33, a prior paper by two of the present authors, but it is used only to explain the qualitative slope of the dynamic-capture boundary in Fig. 2a; no parameter is fitted to the present data and no quantitative prediction is tested, so the self-citation is not load-bearing. The absence of an independently calibrated accuracy measurement for the 2 nA plateau is an evidentiary limitation for metrological claims, but it is not a circularity: the reported 'accuracy' is the deviation of the normalized pump current from its ideal integer value, and that quantity is directly measured rather than constructed from the claim it supports. Accordingly, the derivation chain is self-contained and no circular step is exhibited.

Assumptions & free parameters 1 free parameters · 4 assumptions · 0 invented entities

The central experimental result is a direct measurement of pumped current from parallel TSEPs. The only model used is the prior dynamic-capture theory from the same group (Ref. 33), whose parameters are not re-fitted in this paper. No new physical entities, forces, or conserved quantities are introduced.

free parameters (1)
  • const. in P1 exponent
    Unspecified additive constant in the analytical expression for capture probability in the Supporting Information. It is carried over from Ref. 33 and affects the absolute position of the dynamic-capture boundary, but is not determined in this paper.
assumptions (4)
  • domain assumption Dynamic capture model for a single TSEP, following Kashcheyevs-Kaestner (Ref. 32) and Yamahata et al. (Ref. 33).
    The paper uses this model to explain the effect of source voltage on capture probability and the slope of the boundary in Fig. 2a. The model is not re-derived here.
  • domain assumption The source voltage changes only the source Fermi level and the QD and barrier potentials via capacitive coupling, with no unintended effects on neighboring TSEPs.
    Used to justify that positive source voltage disables a TSEP and to derive the P1 expression. The independent-tuning claim relies on this premise.
  • domain assumption Each TSEP operates in the dynamic capture regime with negligible loading and ejection errors when gates are set appropriately.
    The interpretation of plateaus as ef, 2ef, and 3ef requires that loading and ejection errors are small, as assumed in the operating principle discussion.
  • domain assumption The accuracy of parallelized pumps is limited by the least accurate pump, so summing plateaus gives an accuracy no worse than the worst pump.
    Stated in the tuning section before Fig. 2d and used to justify the potential for high-precision operation. It is not proven for arbitrary pump counts.

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Cite this review

Pith. "Pith review of Scalable Parallel Single-Electron Pumps in Silicon with Split-Source Control in the Nanoampere Regime." pith.science (2026). https://pith.science/paper/MIBOFBBP

@misc{pith2026250417273,
  author       = {Pith},
  title        = {Pith review of: Scalable Parallel Single-Electron Pumps in Silicon with Split-Source Control in the Nanoampere Regime},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/MIBOFBBP}},
  note         = {Machine review of arXiv:2504.17273}
}
read the original abstract

Parallelizing single-electron pumps offers a promising route to achieving nanoampere-level currents crucial for quantum current standard applications. Achieving such current levels is essential for demonstrating the ultra-high accuracy of single-electron pumps below 0.1 ppm toward quantum metrology triangle experiments. In addition, improving the accuracy at this current range is also desirable for practical small-current measurements. However, nanoampere-level currents have not yet been achieved with parallel pumps, mainly due to challenges in optimizing operating conditions. Here, we propose a scalable and easily implementable parallelization method based on tunable-barrier single-electron pumps with split source electrodes. By tuning the source voltages, we successfully parallelize four single-electron pumps at 200 MHz and further demonstrate a current plateau exceeding 2 nA using three pumps at 2.1 GHz. The wide applicability of this parallelization technique opens a path toward advancing high-accuracy quantum current standards.

Figures

Figures reproduced from arXiv: 2504.17273 by the authors.

Figure 1
Figure 1. FIG. 1. (a) False color scanning electron microscope (SEM) image of the parallel tunable-barrier [PITH_FULL_IMAGE:figures/full_fig_p013_1.png] view at source ↗
Figure 2
Figure 2. FIG. 2. (a) Two-dimensional plot of the current [PITH_FULL_IMAGE:figures/full_fig_p014_2.png] view at source ↗
Figure 3
Figure 3. FIG. 3. (a) Two-dimensional plot of the current [PITH_FULL_IMAGE:figures/full_fig_p015_3.png] view at source ↗
Figures from the paper (1 more)
Figure 4
Figure 4. Figure 4: FIG. 4. (a) Two-dimensional plot of the current [PITH_FULL_IMAGE:figures/full_fig_p016_4.png]

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Forward citations

Cited by 1 Pith paper

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score. Full citation record

  1. Scalable quantum current source on commercial CMOS process technology

    physics.app-ph 2025-06 conditional novelty 6.0 of 10

    Quantized single-electron pumping is demonstrated in devices fabricated by a commercial 22nm CMOS foundry, with a parallel-pumped current accurate to 1.2e-3 A/A at 50 MHz.

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