Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links, observed 2026-05-22T17:58:45.319714Z
Paper Citation Record · LEDGER
As of 6 August 2026, this Paper Citation Record lists 44 of 44 outbound references and 5 inbound Pith citation observations for arXiv:2504.19959.
A citation records a reference. It does not transfer a finding from one paper to another.
Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links, observed 2026-05-22T17:58:45.319714Z
One-hop event checks from named stored sources.
Source: scholarly_work_events, retraction_status_cache, observed 2026-08-05T06:32:48.257954+00:00
Pith citing papers itemized under the disclosed page cap.
Source: paper_references, paper_reference_links, observed 2026-05-22T10:18:18.439819Z
A source-named dated measurement, never combined with another source.
Source: pith, observed 2026-05-22T10:21:24.136067Z
44 of 44 outbound references displayed
External citation measurements
No source-named external measurement is stored.
Observation 3909489d-f3be-4a92-8b64-c2c4c0b0a396 · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Are we there yet? a study on the state of high-level synthesis
Reference 1
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation 1bd280aa-a63c-4646-8d2a-2d8493a6af99 · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Closing the verification gap with static sign-off
Reference 2
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation 60f59ef3-fe97-404e-8152-54fc8078c3d7 · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification High performance machine learning models for functional verification of hardware designs
Reference 3
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation 11f8d4df-a3cc-48d8-8418-b2f24b536177 · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Coverage fulfillment automation in hard- ware functional verification using genetic algorithms
Reference 4
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation a9189d4e-50d0-45f0-a73d-56121e7a8269 · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Machine learning in the service of hardware functional verification
Reference 5
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation 8ec01064-eeca-457b-8a3d-a5b6532c55db · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Unresolved cited work
Reference 6
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation 4218459e-88ed-476d-a49e-c41c74984cf7 · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Harris and D
Reference 7
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation de3ad287-8bc6-48ad-87ba-e9b537692808 · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification A uvm-based smart functional verification platform: Concepts, pros, cons, and opportunities
Reference 8
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation fe1f595d-bf4c-4e3e-8942-f00b372c35ec · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Pragmatic approaches to implement self-checking mechanism in uvm based testbench
Reference 9
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation e4a2aa0c-77bd-4c97-b016-c8e05e71338d · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Uvm based testbench architecture for coverage driven functional verification of spi protocol
Reference 10
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation 3534204f-7c93-44e9-99b3-2936bedcec59 · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Beyond uvm for practical soc verification
Reference 11
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation d462db32-8814-40cd-a12d-0e8c7c724b5c · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Simplified stimuli generation for scenario and assertion based verification
Reference 12
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation 923089b4-781e-48d4-9766-3519629c4ca3 · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Uvm-based verification of ecc module for flash memories
Reference 13
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation fca70ca9-a9d0-495d-862a-5d958bfbdf79 · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Portable stimulus driven systemverilog/uvm verification environment for the verification of a high-capacity ethernet communication endpoint
Reference 14
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation 56d7ad37-841b-4086-a41d-22097993bf77 · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification If systemverilog is so good, why do we need the uvm? sharing responsibilities between libraries and the core language
Reference 15
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation faf874bd-0b39-42a4-802f-308d9cc9e7b1 · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Uvm based testbench architecture for unit verification
Reference 16
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation 88bed45a-54be-49ca-aec4-eda5fb2f0697 · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Case study: Uvm-fie: Enhancing uvm-based fault injection library for complex designs
Reference 17
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation 98af7612-9674-488a-824e-bf87982966ba · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Uvm based testbench architecture for logic sub-system verification
Reference 18
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation d9e5bf77-1a08-452e-8857-b785b21dbec9 · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Design and verification process of combinational adder using uvm methodology
Reference 19
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation ed501649-3b77-4993-8081-cf86aa66d5e4 · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Robust serial driver verification through uvm framework
Reference 20
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation 5388d4d3-d3c5-4b7d-b1b1-c1e003556a3f · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Modified condition decision coverage: A hardware verification perspective
Reference 21
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation 3d98d286-22d1-49f3-be02-02b77eff6f00 · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification An uvm-based verification platform for hardware and software co-design
Reference 22
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation c482cbeb-be2f-49a6-88a6-cab0020db46c · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Uvm methodology: Industry-specific applications in modern hardware verification
Reference 23
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation 6d45cf80-f53d-4258-b6a2-216737f0f3f4 · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification VeriGen: A Large Language Model for Verilog Code Generation
Reference 24
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation bfc68266-c308-4c00-8757-078a64ec0804 · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Chip-Chat: Challenges and Opportunities in Conversational Hardware Design
Reference 25
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation b82258e1-9bd3-4faf-a718-eee7ef5ae0f2 · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification RTLFixer: Automatically Fixing RTL Syntax Errors with Large Language Models
Reference 26
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation c3169c8c-49fb-4951-a3bf-10d4bf06420a · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Fixing Hardware Security Bugs with Large Language Models
Reference 27
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation 4c46016b-f0ac-4d94-93db-b4f87462bdd4 · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Llm4sechw: Leveraging domain-specific large language model for hardware debug- ging
Reference 28
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation 369601cc-f9c9-47ce-a1f6-1b54753b72e8 · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Make Every Move Count: LLM-based High-Quality RTL Code Generation Using MCTS
Reference 29
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation 156bab64-1182-4a52-a19c-45d83be87f5a · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Domain- adapted llms for vlsi design and verification: A case study on formal verification
Reference 30
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation 8aa321b0-182e-4229-be0a-99dba0eb4ebf · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification HDLdebugger: Streamlining HDL debugging with Large Language Models
Reference 31
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation 765fa4e1-9812-49c7-8bbb-de0682a330ba · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Assertllm: Generating and evaluating hardware verification assertions from design specifications via multi-llms
Reference 32
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation 6d52afbf-bd06-44e6-acb6-0dda80b6d223 · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Location is Key: Leveraging Large Language Model for Functional Bug Localization in Verilog
Reference 33
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation 33b37b81-9c71-495c-8a62-1f0aaa3fae61 · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Insights from Rights and Wrongs: A Large Language Model for Solving Assertion Failures in RTL Design
Reference 34
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation a987f742-2c39-4d74-a37c-382129b20ca1 · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Meic: Re-thinking rtl debug automation using llms
Reference 35
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation e1be1a23-3e27-4bd0-bec1-2e349456e72e · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification UVLLM: An Automated Universal RTL Verification Framework using LLMs
Reference 36
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation 5ecc2230-ec03-4caa-a5cc-f98998473496 · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification A Prompt Pattern Catalog to Enhance Prompt Engineering with ChatGPT
Reference 37
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation d689e41f-ed77-48f7-a863-1812bd5b0078 · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Verilogeval: Evaluating large language models for verilog code generation
Reference 38
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation 74faf284-3b79-4dfb-a792-0fb62a255abc · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Chipgpt: How far are we from natural language hardware design
Reference 39
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation 76638ebc-c188-48c9-801e-81807ec4bb4a · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification A Systematic Survey of Prompt Engineering in Large Language Models: Techniques and Applications
Reference 40
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation 4b348100-c09d-48ab-8796-322cda27f121 · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Hallucinations in llms: Understanding and addressing challenges
Reference 41
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation 8d539a6c-2689-499d-8c9a-2100dbc912cb · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification Hallucinations in large language models (llms)
Reference 42
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation 1f844aa4-7458-42bc-b6d6-ce3982664f74 · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification A Comprehensive Survey of Hallucination Mitigation Techniques in Large Language Models
Reference 43
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation c76af563-6072-4a2a-80f2-724bee73e467 · outbound
From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification RTLLM: An Open-Source Benchmark for Design RTL Generation with Large Language Model
Reference 44
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation 3972d9d4-6222-4ccd-934e-2a62f1008367 · inbound
Spec2Cov: An Agentic Framework for Code Coverage Closure of Digital Hardware Designs From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification
Reference 9
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation c621a7ca-b9f9-4f7c-a909-a9ca1b69226a · inbound
Spec2Cov: An Agentic Framework for Code Coverage Closure of Digital Hardware Designs From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification
Reference 9
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation d6994b0c-c658-46d3-afe9-8ed825fe664c · inbound
Understanding Inference-Time Token Allocation and Coverage Limits in Agentic Hardware Verification From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification
Reference 20
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation 5af10b5c-e701-4b0c-8ce2-f4ee27330936 · inbound
HAVEN: Hybrid Automated Verification ENgine for UVM Testbench Synthesis with LLMs From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification
Reference 23
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.
Observation 335e99cf-718e-499a-b44e-98270021a0e9 · inbound
UVMarvel: an Automated LLM-aided UVM Machine for Subsystem-level RTL Verification From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verification
Reference 48
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.