Paper Citation Record · LEDGER

A Survey on LUT-based Deep Neural Networks Implemented in FPGAs

As of 8 August 2026, this Paper Citation Record lists 23 of 23 outbound references and 0 inbound Pith citation observations for arXiv:2506.07367.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2506.07367 v1

Coverage vector

measured 23 of 23 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-08-07T05:40:11.287024Z

measured 23 of 23 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-07T06:34:17.273281+00:00

measured 0 of 0 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: cited_works

Reference resolution

23 of 23 outbound references displayed

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verified fuzzy23
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External citation measurements

No source-named external measurement is stored.

Outbound references

Observation f85dc97b-892e-4b8e-bf8f-dfcf1f683670 · outbound

This paper cites Fast inference of deep neural networks in FPGAs for particle physics,.

A Survey on LUT-based Deep Neural Networks Implemented in FPGAs Fast inference of deep neural networks in FPGAs for particle physics,

Reference 1

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:40:15.795858Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 7ec55ef6-0557-46ba-8cde-91cb9ad99eab · outbound

This paper cites Efficient Acceleration of Deep Learning Inference on Resource-Constrained Edge Devices: A Review,.

A Survey on LUT-based Deep Neural Networks Implemented in FPGAs Efficient Acceleration of Deep Learning Inference on Resource-Constrained Edge Devices: A Review,

Reference 2

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:40:15.784186Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 148019d4-f49b-479f-9f49-3e1f2785ae80 · outbound

This paper cites LogicNets: Co- Designed Neural Networks and Circuits for Extreme-Throughput Appli- cations,.

A Survey on LUT-based Deep Neural Networks Implemented in FPGAs LogicNets: Co- Designed Neural Networks and Circuits for Extreme-Throughput Appli- cations,

Reference 3

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:40:15.658682Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 356f5f2e-8f0b-4f82-a363-9f366777894e · outbound

This paper cites PolyLUT: Learning Piecewise Polynomials for Ultra-Low Latency FPGA LUT-based Inference,.

A Survey on LUT-based Deep Neural Networks Implemented in FPGAs PolyLUT: Learning Piecewise Polynomials for Ultra-Low Latency FPGA LUT-based Inference,

Reference 4

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:40:15.512740Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 7d47b952-cae3-460f-a143-dd2ab41099ba · outbound

This paper cites FINN: A Framework for Fast, Scalable Binarized Neural Network Inference,.

A Survey on LUT-based Deep Neural Networks Implemented in FPGAs FINN: A Framework for Fast, Scalable Binarized Neural Network Inference,

Reference 5

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:40:15.380444Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 0f686828-ae03-4427-92db-9bc7be4d36ac · outbound

This paper cites LUTNet: Rethinking Inference in FPGA Soft Logic,.

A Survey on LUT-based Deep Neural Networks Implemented in FPGAs LUTNet: Rethinking Inference in FPGA Soft Logic,

Reference 6

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:40:15.104882Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 52cde8dd-f288-4ad0-a7f9-cec3b6190d7e · outbound

This paper cites Energy-efficient, low-latency realization of neural networks through boolean logic minimization,.

A Survey on LUT-based Deep Neural Networks Implemented in FPGAs Energy-efficient, low-latency realization of neural networks through boolean logic minimization,

Reference 7

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:40:14.769033Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 067cd420-d2f2-4d5f-96cc-1ebd077612d3 · outbound

This paper cites PolyLUT-Add: FPGA-based LUT Inference with Wide Inputs.

A Survey on LUT-based Deep Neural Networks Implemented in FPGAs PolyLUT-Add: FPGA-based LUT Inference with Wide Inputs

Reference 8

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:40:14.568353Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation ced50bfe-3abd-49db-8241-5c63f431f854 · outbound

This paper cites NeuraLUT: Hiding Neural Network Density in Boolean Synthesizable Functions,.

A Survey on LUT-based Deep Neural Networks Implemented in FPGAs NeuraLUT: Hiding Neural Network Density in Boolean Synthesizable Functions,

Reference 9

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:40:14.342540Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 4fe114e0-8c42-41ad-b882-640e6fcabe63 · outbound

This paper cites Greater than the Sum of its LUTs: Scaling Up LUT-based Neural Networks with AmigoLUT,.

A Survey on LUT-based Deep Neural Networks Implemented in FPGAs Greater than the Sum of its LUTs: Scaling Up LUT-based Neural Networks with AmigoLUT,

Reference 10

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:40:14.125480Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation c61324cd-8281-4e60-b932-d37bf429572f · outbound

This paper cites A survey on ensemble learning,.

A Survey on LUT-based Deep Neural Networks Implemented in FPGAs A survey on ensemble learning,

Reference 11

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:40:13.987614Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation c5ba3ec1-940c-4793-86f2-5575c4d0dc03 · outbound

This paper cites CompressedLUT: An Open Source Tool for Lossless Compression of Lookup Tables for Function Evaluation and Beyond,.

A Survey on LUT-based Deep Neural Networks Implemented in FPGAs CompressedLUT: An Open Source Tool for Lossless Compression of Lookup Tables for Function Evaluation and Beyond,

Reference 12

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:40:13.904875Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation ef2f26e6-42a9-4a9f-96d0-708596d111c9 · outbound

This paper cites Re- ducedLUT: Table Decomposition with.

A Survey on LUT-based Deep Neural Networks Implemented in FPGAs Re- ducedLUT: Table Decomposition with

Reference 13

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:40:13.708646Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation eedba745-aba6-4002-b91f-7d8b7a4afdd9 · outbound

This paper cites Deep Differen- tiable Logic Gate Networks,.

A Survey on LUT-based Deep Neural Networks Implemented in FPGAs Deep Differen- tiable Logic Gate Networks,

Reference 14

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:40:13.349278Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation d376377d-0045-46a5-9db6-f4a99908e4da · outbound

This paper cites The Exact VC Dimension of the WiSARD n-Tuple Classifier,.

A Survey on LUT-based Deep Neural Networks Implemented in FPGAs The Exact VC Dimension of the WiSARD n-Tuple Classifier,

Reference 15

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:40:13.165975Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 48d817e9-fd4f-49a5-9890-5de5c752b5d9 · outbound

This paper cites Differentiable Weightless Neural Networks,.

A Survey on LUT-based Deep Neural Networks Implemented in FPGAs Differentiable Weightless Neural Networks,

Reference 16

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:40:12.992641Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation f126fee8-8856-4150-9576-8ef07138d573 · outbound

This paper cites TreeLUT: An Efficient Alternative to Deep Neural Networks for Inference Acceleration Using Gradient Boosted Decision Trees,.

A Survey on LUT-based Deep Neural Networks Implemented in FPGAs TreeLUT: An Efficient Alternative to Deep Neural Networks for Inference Acceleration Using Gradient Boosted Decision Trees,

Reference 17

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:40:12.836833Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 2e513daa-3723-4220-a20b-1c9eb4514812 · outbound

This paper cites The MNIST Database of Handwritten Digit Images for Machine Learning Research [Best of the Web],.

A Survey on LUT-based Deep Neural Networks Implemented in FPGAs The MNIST Database of Handwritten Digit Images for Machine Learning Research [Best of the Web],

Reference 18

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:40:12.663917Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 03bb38d8-62ab-4a77-81be-b30b8014e0a4 · outbound

This paper cites UNSW-NB15: A comprehensive data set for network intrusion detection systems (UNSW-NB15 network data set),.

A Survey on LUT-based Deep Neural Networks Implemented in FPGAs UNSW-NB15: A comprehensive data set for network intrusion detection systems (UNSW-NB15 network data set),

Reference 19

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:40:12.460979Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 8f03bba4-cb7d-4cbe-acdd-57ef9f4ca4c8 · outbound

This paper cites Codesign-NAS: Automatic FPGA/CNN Codesign Using Neural Architecture Search,.

A Survey on LUT-based Deep Neural Networks Implemented in FPGAs Codesign-NAS: Automatic FPGA/CNN Codesign Using Neural Architecture Search,

Reference 20

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:40:12.282592Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 4a3aaa46-5950-4290-9637-ab332f5aa96e · outbound

This paper cites DeepSeek- R1: Incentivizing Reasoning Capability in LLMs via Reinforcement Learning,.

A Survey on LUT-based Deep Neural Networks Implemented in FPGAs DeepSeek- R1: Incentivizing Reasoning Capability in LLMs via Reinforcement Learning,

Reference 21

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:40:12.091067Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation f6ac0cb3-23a9-46d8-89f7-ebdc05cf4d2a · outbound

This paper cites Microscal- ing Data Formats for Deep Learning,.

A Survey on LUT-based Deep Neural Networks Implemented in FPGAs Microscal- ing Data Formats for Deep Learning,

Reference 22

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:40:11.869065Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation abbf7a52-338a-4bd4-bf57-11526342ee8e · outbound

This paper cites Explor- ing FPGA designs for MX and beyond,.

A Survey on LUT-based Deep Neural Networks Implemented in FPGAs Explor- ing FPGA designs for MX and beyond,

Reference 23

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:40:11.544885Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Pith citing papers

No inbound Pith citation observations are available.