Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links
Paper Citation Record · LEDGER
SANGAM: SystemVerilog Assertion Generation via Monte Carlo Tree Self-Refine
As of 3 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 1 inbound Pith citation observation for arXiv:2506.13983.
A citation records a reference. It does not transfer a finding from one paper to another.
Coverage vector
One-hop event checks from named stored sources.
Source: scholarly_work_events, retraction_status_cache, observed 2026-08-03T06:30:56.289259+00:00
Pith citing papers itemized under the disclosed page cap.
Source: paper_references, paper_reference_links, observed 2026-05-08T08:19:42.493657Z
A source-named dated measurement, never combined with another source.
Source: arxiv_reference, observed 2026-05-11T20:41:11.936700Z
Reference resolution
0 of 0 outbound references displayed
- verified exact0
- verified fuzzy0
- unresolved0
- parse uncertain0
- malformed identifier0
- metadata mismatch0
External citation measurements
No source-named external measurement is stored.
Outbound references
No outbound reference observations are available for this paper version.
Pith citing papers
Observation d29a0d0f-92b0-42fb-9a9c-8e46e0e34b70 · inbound
From Language to Logic: Bridging LLMs & Formal Representations for RTL Assertion Generation cites this paper.
From Language to Logic: Bridging LLMs & Formal Representations for RTL Assertion Generation SANGAM: SystemVerilog Assertion Generation via Monte Carlo Tree Self-Refine
Reference 28
- Resolution
- verified exact
- arxiv_id, observed 2026-05-11T20:41:11.951183Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-03T06:30:56.289259+00:00.