Pith. sign in

REVIEW 2 major objections 8 minor 135 references

Comparison of spin-qubit architectures for quantum error-correcting codes

T0 review · 2 major / 8 minor · reviewed 2026-08-15 · deepseek-v4-flash

Challenge this review Re-run · record.json Download PDF Read on arXiv ↗ Review JSON

Pith's one-line read Simulations of distance-3 surface and Bacon-Shor codes on silicon spin qubits find that a hybrid encoding—single-electron Loss–DiVincenzo data qubits paired with fast-readout singlet–triplet ancillas—outperforms an all-Loss–DiVincenzo…

desk verdict Useful spin-qubit QEC architecture comparison with a genuinely valuable BS state-prep result, but the central gate-error-dominance claim is undercut by an unexplained mapping of distinct LD/ST gate infidelities to a single sampler parameter. read the letter →

arxiv 2506.17190 v2 pith:JOOY7FAC submitted 2025-06-20 quant-ph

Mauricio Gutiérrez , Juan S. Rojas-Arias , David Obando , Chien-Yuan Chang This is my paper · ORCID
classification quant-ph PACS 03.67.Pp03.67.Lx
keywords siliconspinqubitsquantumerrorcorrectionsurfacecodeBacon-ShorLoss-DiVincenzoqubitsinglet-triplethybridencodinglogicalrate
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

This paper simulates two quantum error-correcting codes—the surface code and the Bacon-Shor code—on silicon spin qubits, using realistic experimental error rates. It compares a layout where every qubit is a single-electron Loss–DiVincenzo spin with a hybrid layout where data qubits are Loss–DiVincenzo and ancilla qubits are faster-read singlet–triplet qubits. The central finding is that the hybrid layout wins by more than an order of magnitude, because the short singlet–triplet readout prevents data qubits from dephasing during syndrome measurement. The paper also finds that at current parameters the logical error rate is limited by one- and two-qubit gate errors, not by memory or coherence errors, and that the Bacon-Shor code's fault-tolerant logical state preparation is about two orders of magnitude better than the surface code's because it can be done coherently without projective measurements.

What carries the argument

The load-bearing object is the hybrid qubit layout: nine Loss–DiVincenzo data qubits (single-electron spins in single dots) and eight singlet–triplet ancilla qubits (two-electron states in double dots), coupled by exchange-mediated CZ gates, with the ST ancillas reading out roughly ten times faster than LD qubits. Two codes share the same stabilizer-measurement circuit and differ only in the classical decoder: the surface code uses all weight-2 and weight-4 outcomes directly, while the Bacon-Shor code discards some information and multiplies outcomes to get weight-6 parity checks. The performance evaluation is carried by a stabilizer simulator with an error-subset importance sampler that returns lower and upper bounds on logical error rates for eight independent Pauli noise parameters. For the Bacon-Shor advantage, the key mechanism is a shallow GHZ-state preparation circuit that is naturally fault-tolerant at distance 3, requiring row connectivity between data qubits.

What would settle it

Measure the logical error rate of the hybrid surface-17 code at the optimal integration time in two otherwise identical silicon devices whose ST two-qubit gate infidelities differ by tenfold while T2* is held fixed; the paper predicts a clear drop in logical error, whereas a memory-limited scenario predicts none. A cheaper check is to re-run the simulation with T2* set to infinity: the paper predicts the logical floor stays near 1e-2, limited by gates.

Watch

Extended reading notes

Core claim

On the paper's own terms, the central discovery is a quantitative ranking of two architectures for a distance-3 logical qubit in silicon. Using state-of-the-art Si/SiGe parameters, the authors simulate one round of fault-tolerant quantum error correction and fault-tolerant logical state preparation for the surface-17 and Bacon-Shor-17 codes. They find that the hybrid LD-ST scheme reduces the logical error rate by more than an order of magnitude compared with the all-LD scheme, that the surface code is slightly better than Bacon-Shor in the QEC cycle, and that Bacon-Shor is about two orders of magnitude better at logical state preparation because its |0⟩ and |+⟩ states can be prepared by a unitary GHZ circuit rather than projective stabilizer measurements. The paper further claims that, for these fast distance-3 protocols, the logical error floor is fundamentally limited by gate errors—chiefly one- and two-qubit gate infidelities—and not by memory (dephasing) errors.

Load-bearing premise

The load-bearing premise is that the faster-readout singlet-triplet ancilla qubits will have roughly the same two-qubit gate quality in silicon as in the gallium-arsenide experiments their parameters are borrowed from, and that noise on different qubits is uncorrelated; if either assumption fails, the quantitative sizes of the hybrid advantage and the gate-vs-memory conclusion change.

Editorial extensions

If this is right

  • A proof-of-concept distance-3 experiment on silicon should prioritize lowering one- and two-qubit gate infidelities: reducing them together by tenfold lowers the surface-17 hybrid logical error floor from about 1.7e-2 to below 1e-3, while cutting CZ duration or state-preparation error alone has almost no effect.
  • The hybrid logical qubit at state-of-the-art readout times makes a slightly better quantum memory than an unprotected physical LD qubit, but a simple spin-echo pulse on a physical qubit outperforms it; the logical qubit is not yet a memory win.
  • For the Bacon-Shor-17 code, fault-tolerant preparation of logical |0⟩ and |+⟩ at about 4.05e-4 beats physical state preparation by roughly an order of magnitude and the surface-17 projective preparations by two orders of magnitude, provided direct entangling gates exist between data qubits along rows or columns.
  • The optimal ST readout integration time for the logical error rate is about 0.88 microseconds, shorter than the roughly 1.4 microseconds that minimizes readout infidelity, so choosing the integration time for QEC is a separate optimization from choosing it for readout alone.
  • The conclusion that gate errors dominate memory errors is confined to fast distance-3 protocols; the paper expects memory errors to become significant for higher-distance codes that require more syndrome-measurement rounds.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • The gate-error-dominance result, if it holds beyond the simulated circuits, implies that near-term silicon spin-qubit roadmaps should spend their fidelity budget on faster and more accurate gates rather than on prolonging T2*; coherence gains only pay when code distance grows.
  • The Bacon-Shor coherent state-preparation advantage suggests that early fault-tolerant demonstrations might be better served by choosing a code with a shallow unitary logical-preparation circuit than by choosing the code with the best QEC cycle, since state injection is often the bottleneck.
  • A clean experimental discriminator would be to measure the surface-17 hybrid logical error floor at the optimal integration time while varying only the ST two-qubit gate error; the paper's model predicts a roughly 1.75-fold drop when the CZ infidelity goes from 4e-3 to 4e-4.
  • Because the paper uses uncorrelated Pauli noise, spatial noise correlations seen in silicon spin-qubit pairs could alter the ranking; if correlated errors mimic higher-weight errors, distance-3 codes would fail faster than these simulations predict.
Share X Bluesky LinkedIn Reddit HN

Signed reviews

No signed human review yet.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

2 major / 8 minor

Summary. The paper studies distance-3 surface and Bacon-Shor codes implemented on silicon spin qubits, comparing an all-Loss-DiVincenzo (LD) encoding with a hybrid LD-data/ST-ancilla encoding. Using stabilizer simulations with a circuit-level Pauli noise model parameterized by experimental values from Table I, the authors compute logical error rates for one fault-tolerant QEC step and for logical |0> and |+> state preparation. They report that the hybrid scheme outperforms the all-LD scheme because of the much shorter ST readout, that surface-17 slightly beats BS-17 in the QEC step but BS-17 is about two orders of magnitude better in logical state preparation, and that the logical error rate is dominated by 1- and 2-qubit gate errors rather than memory errors.

Significance. If the results hold, the paper provides a practically useful comparison for near-term silicon spin-qubit QEC experiments. Its strengths include the explicit, table-driven physical parameter set; the use of lower and upper bounds on logical error rates via an error-subset sampler; and the observation that the surface and BS circuits can be identical, differing only in classical decoding. The claim that gate errors, not memory errors, set the logical error floor for distance-3 hybrid schemes is a concrete, falsifiable prediction that would usefully guide hardware improvements. The simulation methodology is standard and carefully described, and the work is non-circular: no parameter was fitted to the target logical error rates.

major comments (2)
  1. [IV.B and Table I] The error-subset sampler in Sec. IV.B is described with m=8 independent parameters, each with a single probability p_i in Eq. (1), yet Sec. II and Table I assign different error probabilities to LD and ST qubits for single-qubit gates (4e-4 vs 4e-3) and two-qubit gates (2e-3 vs 4e-3). The manuscript never explains how these distinct values are mapped onto the sampler's categories, for example whether the 'after 1-qubit gates' category uses one value or separate values per qubit type. If the implementation uses a single value, such as the larger ST value, for all single-qubit gates, then the RY(±π/2) gates on the LD data qubits would carry a tenfold-inflated error rate; since Sec. V.B identifies these data-qubit RY gates as the dominant source of the p1q sensitivity, the gate-error floor in Fig. 11 could be substantially overestimated, and the saturation of the T2*=21 µs curve at the T2*→∞ bound, which is the direct evidence for the headline claim, might disappear when the correct LD value of 4e-4 is used. This ambiguity must be resolved and, if necessary, the simulations rerun with per-type gate-error parameters.
  2. [Table I and Sec. V.B] The quantitative conclusions depend on two extrapolated ST-qubit parameters: the two-qubit gate infidelity of 4e-3 is taken from a GaAs LD-ST experiment [48] and assumed for silicon, and the ST coherence time is set to T2*,ST = T2*,LD/√2. The authors mention the expected improvement in silicon, but the gate-error-dominance claim in Sec. V.B is stated for 'current parameters' and would shift if these extrapolations are off by even a factor of a few. A sensitivity analysis over a plausible range of these ST parameters, for example p2q,ST from 1e-3 to 1e-2 and T2*,ST from 5 µs to 30 µs, would make the robustness of the hybrid advantage and of the gate-error floor quantitative rather than assumed.
minor comments (8)
  1. [Introduction] The phrase 'have been showed recently' should be 'have been shown recently'.
  2. [Author affiliations] The affiliation contains a typo: 'Univeristy' should be 'University'.
  3. [Sec. III] The sentence 'The decoding (inferring the error that occurred based on the syndromes).' is an incomplete sentence; it should be rephrased.
  4. [Fig. 9 caption] The caption contains a typo: 'inital state preparation error probability' should be 'initial state preparation error probability'.
  5. [Fig. 11 caption] The caption contains a typo: 'doted line' should be 'dotted line'.
  6. [Fig. 12 caption] The caption contains a duplicated article: 'For the the surface-17 code' should be 'For the surface-17 code'.
  7. [Fig. 7 caption] The coherence-time labels '21 s' and '210 s' should be '21 µs' and '210 µs' to match the units used in the text.
  8. [Sec. V.C] The word 'Thisconstitutes' is missing a space and should read 'This constitutes'.

Circularity Check

0 steps flagged · score 0.0 of 10

No significant circularity: the logical error rates are simulation outputs driven by externally measured physical parameters, not by construction or by self-citational redefinition.

full rationale

The paper's derivation chain is a stabilizer-circuit simulation: physical error probabilities (gate infidelities, readout times/fidelities, T2* times) are taken from external experiments and cited literature, then fed into a Clifford/Pauli error model. The central claims—that the hybrid LD-ST scheme outperforms all-LD, that surface-17 slightly beats BS-17 for one QEC step, and that gate errors (especially 1- and 2-qubit gates) dominate over memory errors at current parameters—are outputs of this simulation, not definitions or fitted targets. No parameter was fitted to reproduce the logical error rates, and no claim is justified solely by the authors' prior work. The error-subset sampler is borrowed from the authors' earlier papers, but the method is described explicitly in Sec. IV.B with the subset-weight formula A_w and bounds in Eqs. (1)-(2), making it a reusable tool rather than a load-bearing self-citation. The ST T2* = LD T2*/sqrt(2) relation and the GaAs-derived two-qubit gate infidelity are stated assumptions with given derivations/justifications; they are inputs, not conclusions. The reviewer's concern that a single p1q value may have been used for both LD and ST single-qubit gates is a potential modeling-accuracy issue, not a circularity: it concerns whether an input was set to the most appropriate experimental value, not whether the prediction reduces to its input by construction. The paper also explicitly flags uncorrelated Pauli noise as a limitation, further showing the claims are contingent on stated assumptions rather than definitionally forced. Therefore no circular step can be exhibited with the required specificity, and the honest finding is no significant circularity.

Assumptions & free parameters 3 free parameters · 6 assumptions · 0 invented entities

The central claims rest on a standard stabilizer simulation with experimentally sourced error parameters. The main load-bearing inputs are the ST qubit coherence and gate error values, plus the uncorrelated-noise assumption. No new physical entities are introduced.

free parameters (3)
  • ST qubit T2* = 14.8 us
    Chosen as the LD T2* (21 us) divided by sqrt(2), assuming uncorrelated Zeeman fluctuations in the two dots. This sets the memory-error contribution during the ST readout and directly affects the hybrid scheme's error budget (Table I).
  • ST two-qubit gate infidelity = 4e-3
    Taken from a GaAs LD-ST experiment [48] and assumed to apply to silicon, though the footnote expects more than a ten-fold improvement in isotopically purified silicon. This parameter strongly influences the gate-error floor in the hybrid scheme.
  • LD-to-ST readout duration ratio = 10:1
    Used to place the upper and lower axes of Fig. 7 when sweeping readout durations; the cross-over between all-LD and hybrid performance depends on this assumed ratio, though the state-of-the-art comparison uses the independently measured durations.
assumptions (6)
  • domain assumption Non-Clifford noise processes are approximated by stochastic Pauli (Clifford) error channels.
    Stated in Section IV A; required for stabilizer simulation. Standard practice, but an approximation to real noise.
  • domain assumption Idling qubits dephase according to pidle = (1/2)(1 - exp(-(t/T2*)^2)), a Gaussian decay characteristic of 1/f noise.
    Used for memory errors in Section IV A; the exact functional form affects how readout duration translates into dephasing.
  • domain assumption Noise is uncorrelated across qubits and in time.
    Acknowledged as a limitation in Section VI; real spin qubits show spatial and temporal noise correlations [109-112].
  • standard math The distance-3 rotated surface code is a gauge fixing of the square Bacon-Shor code, allowing identical stabilizer-measurement circuits.
    Used in Section IV C to compare the two codes on equal footing; this is a known compass-code relation.
  • domain assumption The GHZ-based logical state preparation circuit of Fig. 6 is fault-tolerant for distance-3 because propagated single-qubit errors are equivalent to stabilizers.
    Stated in Section IV C; it justifies the Bacon-Shor coherent preparation advantage.
  • domain assumption Single-qubit gates have zero duration; dephasing during them is equivalent to longer CZ gates.
    Assumed in Section IV A; the authors argue it does not matter because CZ duration has no effect on logical error rate (Fig. 9b).

how reviews work

0 comments
Cite this review

Pith. "Pith review of Comparison of spin-qubit architectures for quantum error-correcting codes." pith.science (2026). https://pith.science/paper/JOOY7FAC

@misc{pith2026250617190,
  author       = {Pith},
  title        = {Pith review of: Comparison of spin-qubit architectures for quantum error-correcting codes},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/JOOY7FAC}},
  note         = {Machine review of arXiv:2506.17190}
}
read the original abstract

We investigate the performance of two quantum error-correcting codes, the surface code and the Bacon-Shor code, for implementation with spin qubits in silicon. In each case, we construct a logical qubit using a planar array of quantum dots, exploring two encoding schemes: one based solely on single-electron Zeeman qubits (Loss-DiVincenzo qubits), and a hybrid approach combining Zeeman and singlet-triplet qubits. For both codes, we evaluate key performance metrics, including logical state preparation fidelity and cycle-level error correction performance, using state-of-the-art experimental parameters. Our results show that the hybrid encoding consistently outperforms the pure Zeeman-qubit implementation. By identifying the dominant error mechanisms that limit quantum error correction performance, our study highlights concrete targets for improving spin qubit hardware and provides a path toward scalable fault-tolerant architectures. In particular, we find that the logical error rate is not limited by memory errors, but rather by gate errors, especially 1- and 2-qubit gate errors.

Figures

Figures reproduced from arXiv: 2506.17190 by the authors.

Figure 1
Figure 1. FIG. 1. (a) Illustration of [PITH_FULL_IMAGE:figures/full_fig_p002_1.png] view at source ↗
Figure 2
Figure 2. FIG. 2. Qubit layout for (a) the distance-3 rotated surface [PITH_FULL_IMAGE:figures/full_fig_p004_2.png] view at source ↗
Figure 3
Figure 3. FIG. 3. Layouts of QEC codes implemented with the hybrid [PITH_FULL_IMAGE:figures/full_fig_p005_3.png] view at source ↗
Figures from the paper (8 more)
Figure 4
Figure 4. Figure 4: FIG. 4. Scheme to perform FT QEC for the distance-3 codes [PITH_FULL_IMAGE:figures/full_fig_p007_4.png]
Figure 6
Figure 6. Figure 6: FIG. 6. Circuit used in our simulations to prepare the GHZ [PITH_FULL_IMAGE:figures/full_fig_p008_6.png]
Figure 7
Figure 7. Figure 7: FIG. 7. Logical error rate for 1 QEC step of the surface-17 [PITH_FULL_IMAGE:figures/full_fig_p009_7.png]
Figure 8
Figure 8. Figure 8: FIG. 8. Logical error rate for [PITH_FULL_IMAGE:figures/full_fig_p010_8.png]
Figure 9
Figure 9. Figure 9: FIG. 9. Logical error rate for 1 QEC step of the surface-17 in the hybrid encoding scheme as a function of the readout [PITH_FULL_IMAGE:figures/full_fig_p011_9.png]
Figure 10
Figure 10. Figure 10: FIG. 10. Logical error rate for 1 QEC step of the surface [PITH_FULL_IMAGE:figures/full_fig_p012_10.png]
Figure 11
Figure 11. Figure 11: FIG. 11. Logical error rate for 1 QEC step of the surface-17 [PITH_FULL_IMAGE:figures/full_fig_p013_11.png]
Figure 13
Figure 13. Figure 13: FIG. 13. Readout infidelity of the ST qubit as a function of [PITH_FULL_IMAGE:figures/full_fig_p015_13.png]

Review history (2 revisions) →

Discussion (0). Continue with ORCID to comment.

Reference graph

Works this paper leans on

135 extracted references · 55 canonical work pages

  1. [48]

    A. R. Calderbank, E. M. Rains, P. W. Shor, and N. J. A. Sloane, Quantum error correction and orthogonal geom- etry, Phys. Rev. Lett.78, 405 (1997)

    1997

  2. [1]

    Bit-flip (X) error after|0⟩ state preparation with probabilitypp

  3. [2]

    In the limit ∆EZ ≫ JST, the basis states become product states: |˜0ST⟩ ≃ |↑↓⟩ and|˜1ST⟩ ≃ |↓↑⟩

    A nonzero ∆EZ hybridizes the singlet and triplet states. In the limit ∆EZ ≫ JST, the basis states become product states: |˜0ST⟩ ≃ |↑↓⟩ and|˜1ST⟩ ≃ |↓↑⟩. Gate voltages allow for the tuning of both JST and, to some extent, ∆EZ, meaning the qubit eigenstates can vary depending on device-specific tuning. The energy splitting between qubit states is EST = p ∆E...

  4. [3]

    The only single-qubit gates in our cir- cuits are±π/2 rotations about the Y axis

    Y error after rotations about the Y axis with prob- ability p1q. The only single-qubit gates in our cir- cuits are±π/2 rotations about the Y axis

  5. [4]

    (d) Quantum-dot implementation of the BS-17 code, with data qubits (red single dots) encoded as LD qubits and ancilla qubits (purple pairs) encoded as ST qubits

    (c) BS-17 code with data qubits in red and ancilla qubits in purple. (d) Quantum-dot implementation of the BS-17 code, with data qubits (red single dots) encoded as LD qubits and ancilla qubits (purple pairs) encoded as ST qubits. The BS- 17 implementation requires a qubit connectivity of 6 to allow for the unitary preparation of GHZ states along the rows...

  6. [5]

    Bit-flip(X)errorbeforemeasurementinthe Z basis with probabilitypm

  7. [6]

    8 The procedure to prepare a logical|0⟩L state is analo- gous to the one described above

    Perform noise-free error correction to project the final corrected state back to the codespace. 8 The procedure to prepare a logical|0⟩L state is analo- gous to the one described above. The difference is that the data register is initialized in|0⟩⊗9 and the roles of the X and Z stabilizers are interchanged. Z1≠Z2 Z1 ≠ Z2 Z1 ⩵ Z2 Z1⩵Z2 Ancilla Data SZ3 SZ2...

  8. [7]

    ZZ error after the CZ gate with probabilitypCZ

Show all 135 references
  1. [8]

    The Gaussian decay characterizes the coherence loss in systems exposed to1/f-type (low-frequency) noise, which is the most common in solid-state systems

    Independent Z errors on every idle qubit during op- erations on other qubits with probabilitypidle = 1 2 1− exp(−(tidle/T∗ 2 )2) , where tidle is the dura- tion of the corresponding operation andT∗ 2 is the dephasing time constant of the idling qubit. The Gaussian decay charac...

  2. [9]

    Likewise, the error probabilities of state preparations, measure- ments, single-qubit gates, and CZ gate will be different depending on the type of qubit. Throughout our simulations, single-qubit gates are as- sumed to have a duration of exactly 0, so the only opera- tions tha...

  3. [10]

    The total probability of occurrenceA ⃗ wis computed for the most likely error subsets. This can be cal- culated analytically with the following formula: A ⃗ w= mY i=1 ni wi pwi i (1−pi)ni−wi, where ni (pi) is the total number of gates or steps (the physical probability) associ...

  4. [11]

    For the selection of the most likely error subsets, direct sampling is performed to estimate the logical error rate,p( ⃗ w) L . We then calculate lower and upper bounds to the exact logical error rate with the following equations: p(lower) L = ⃗ wmaxX ⃗ w=(0,0,...0) A ⃗ wp( ⃗ ...

  5. [12]

    Theprocedureisperformedwith |+⟩L

    Start with a perfect (error-free) logical state on the dataqubits. Theprocedureisperformedwith |+⟩L

  6. [13]

    The measurements are performed all at the end simultaneously

    Using the ancillary qubits, measure all the stabi- lizers 1 time in a quantum non-demolition (QND) fashion. The measurements are performed all at the end simultaneously. These operations are de- picted in Fig. 4(b) and 4(c)

  7. [14]

    If an error is detected, measure all the stabilizers 1 more time (move to the next step)

    If no errors are detected, the process stops. If an error is detected, measure all the stabilizers 1 more time (move to the next step). See Fig. 4(a)

  8. [15]

    These are included in the Appendix A

    Use the last stabilizer outcomes to correct the logi- calstate basedonthecorrespondinglook-uptables. These are included in the Appendix A

  9. [16]

    If the projected state is different from the initial one, a logical error has occurred

    After the correction is applied, perform noise-free error correction to project the final corrected state back to the codespace. If the projected state is different from the initial one, a logical error has occurred. If not, the QEC procedure has been suc- cessful. Notice that...

  10. [17]

    This initialization is not error-free

    Prepare all data qubits in the|+⟩ state, i.e., the data register is initialized in the product state |+⟩⊗9. This initialization is not error-free

  11. [18]

    The Z stabilizers have two objectives: (a) project the initial product state to one of the code subspaces and (b) detect and correct X errors

    Using the ancillary qubits, measure all the stabiliz- ers 1 time in a QND fashion, starting with the Z stabilizers. The Z stabilizers have two objectives: (a) project the initial product state to one of the code subspaces and (b) detect and correct X errors. The X stabilizers ...

  12. [19]

    Other- wise, if the X stabilizers do not detect a Z error, only repeat the measurement of the Z stabilizers

    If the X stabilizers detect a Z error, repeat the mea- surement of both the Z and X stabilizers. Other- wise, if the X stabilizers do not detect a Z error, only repeat the measurement of the Z stabilizers. In the latter case, we assume that no Z errors have occurred

  13. [20]

    Otherwise, repeat the measurement of the Z stabilizers one more time and stop

    If the first and second Z-stabilizer syndromes co- incide, the procedure stops. Otherwise, repeat the measurement of the Z stabilizers one more time and stop

  14. [21]

    Correct accordingly

    Use the final Z and X stabilizer outcomes to correct the logical state based on the corresponding look- up table. Correct accordingly. Ancilla Data S1 (SX1, SZ1) Stabilizers detect error Stabilizers detect no error HALTS2 (SX2, SZ2) HALT HALT SX: X Stabilizer SZ: Z Stabilizer ...

  15. [22]

    P. W. Shor, Scheme for reducing decoherence in quan- tum computer memory, Phys. Rev. A52, R2493 (1995)

    1995

  16. [23]

    For state-of-the-art parameters, the hybrid scheme outperforms the all-LD scheme by more than one or- der of magnitude. The hybrid scheme’s superior per- formance is essentially due to the much shorter read- out duration, which drastically reduces the dephasing on the data qub...

  17. [24]

    P. W. Shor, Polynomial-time algorithms for prime fac- torization and discrete logarithms on a quantum com- puter, SIAM review41, 303 (1999)

    1999

  18. [25]

    Farhi, J

    E. Farhi, J. Goldstone, S. Gutmann, J. Lapan, A. Lund- gren, and D. Preda, A quantum adiabatic evolution al- gorithm applied to random instances of an np-complete problem, Science292, 472 (2001)

    2001

  19. [26]

    Aspuru-Guzik, A

    A. Aspuru-Guzik, A. D. Dutoi, P. J. Love, and M. Head- Gordon, Simulated quantum computation of molecular energies, Science309, 1704 (2005)

    2005

  20. [27]

    Biamonte, P

    J. Biamonte, P. Wittek, N. Pancotti, P. Rebentrost, N. Wiebe, and S. Lloyd, Quantum machine learning, Nature 549, 195 (2017)

    2017

  21. [28]

    R. P. Feynmanet al., Simulating physics with comput- ers, Int. j. Theor. phys21 (2018)

    2018

  22. [29]

    D. P. DiVincenzo, The physical implementation of quantum computation, Fortschritte der Physik48, 771 (2000)

    2000

  23. [30]

    Hanson, L

    R. Hanson, L. P. Kouwenhoven, J. R. Petta, S. Tarucha, and L. M. Vandersypen, Spins in few-electron quantum dots, Rev. Mod. Phys.79, 1217 (2007)

    2007

  24. [31]

    F. A. Zwanenburg, A. S. Dzurak, A. Morello, M. Y. Simmons, L. C. Hollenberg, G. Klimeck, S. Rogge, S. N. Coppersmith,andM.A.Eriksson,Siliconquantumelec- tronics, Rev. Mod. Phys.85, 961 (2013)

    2013

  25. [32]

    Burkard, T

    G. Burkard, T. D. Ladd, A. Pan, J. M. Nichol, and J. R. Petta, Semiconductor spin qubits, Rev. Mod. Phys.95, 025003 (2023)

    2023

  26. [33]

    Zwerver, T

    A. Zwerver, T. Krähenmann, T. Watson, L. Lampert, H. C. George, R. Pillarisetty, S. Bojarski, P. Amin, 16 S. Amitonov, J. Boter, et al. , Qubits made by ad- vanced semiconductor manufacturing, Nat. Electron.5, 184 (2022)

    2022

  27. [34]

    R. Li, N. D. Stuyck, S. Kubicek, J. Jussot, B. Chan, F. Mohiyaddin, A. Elsayed, M. Shehata, G. Simion, C. Godfrin, et al., A flexible 300 mm integrated si mos platform for electron-and hole-spin qubits exploration, in 2020 IEEE International Electron Devices Meeting (IEDM) (IE...

    2020

  28. [35]

    Veldhorst, H

    M. Veldhorst, H. G. J. Eenink, C. H. Yang, and A. S. Dzurak,Siliconcmosarchitectureforaspin-basedquan- tum computer, Nature Communications8, 1766 (2017)

    2017

  29. [36]

    V. John, F. Borsoi, Z. György, C.-A. Wang, G. Széchenyi, F. van Riggelen-Doelman, W. I. Lawrie, N. W. Hendrickx, A. Sammak, G. Scappucci, et al. , Bichromatic rabi control of semiconductor qubits, Phys- ical review letters132, 067001 (2024)

    2024

  30. [37]

    Lawrie, M

    W. Lawrie, M. Rimbach-Russ, F. v. Riggelen, N. Hen- drickx, S. d. Snoo, A. Sammak, G. Scappucci, J. Helsen, and M. Veldhorst, Simultaneous single-qubit driving of semiconductor spin qubits at the fault-tolerant thresh- old, Nature Communications14, 3617 (2023)

    2023

  31. [38]

    Noiri, K

    A. Noiri, K. Takeda, T. Nakajima, T. Kobayashi, A. Sammak, G. Scappucci, and S. Tarucha, Fast univer- sal quantum gate above the fault-tolerance threshold in silicon, Nature601, 338 (2022)

    2022

  32. [39]

    X. Xue, M. Russ, N. Samkharadze, B. Undseth, A. Sam- mak, G. Scappucci, and L. M. Vandersypen, Quantum logic with spin qubits crossing the surface code thresh- old, Nature601, 343 (2022)

    2022

  33. [40]

    A. R. Mills, C. R. Guinn, M. J. Gullans, A. J. Sig- illito, M. M. Feldman, E. Nielsen, and J. R. Petta, Two- qubit silicon quantum processor with operation fidelity exceeding 99%, Sci. Adv.8, 14 (2022)

    2022

  34. [41]

    Y.-H. Wu, L. C. Camenzind, A. Noiri, K. Takeda, T. Nakajima, T. Kobayashi, C.-Y. Chang, A. Sammak, G. Scappucci, H.-S. Goan, et al. , Hamiltonian phase error in resonantly driven cnot gate above the fault- tolerant threshold, npj Quantum Inf.10, 8 (2024)

    2024

  35. [42]

    Tanttu, W

    T. Tanttu, W. H. Lim, J. Y. Huang, N. Du- moulin Stuyck, W. Gilbert, R. Y. Su, M. Feng, J. D. Cifuentes, A. E. Seedhouse, S. K. Seritan, et al. , As- sessment of the errors of high-fidelity two-qubit gates in silicon quantum dots, Nat. Phys. , 1 (2024)

    2024

  36. [43]

    E. T. Campbell, Early fault-tolerant simulations of the hubbard model, Quantum Sci. Technol.7, 015007 (2021)

    2021

  37. [44]

    I. D. Kivlichan, C. Gidney, D. W. Berry, N. Wiebe, J. McClean, W. Sun, Z. Jiang, N. Rubin, A. Fowler, A. Aspuru-Guzik, et al., Improved fault-tolerant quan- tum simulation of condensed-phase correlated electrons via trotterization, Quantum4, 296 (2020)

    2020

  38. [45]

    Noiri, K

    A. Noiri, K. Takeda, J. Yoneda, T. Nakajima, T. Kodera, and S. Tarucha, Radio-frequency-detected fast charge sensing in undoped silicon quantum dots, Nano Lett.20, 947 (2020)

    2020

  39. [46]

    Knill and R

    E. Knill and R. Laflamme, Theory of quantum error- correcting codes, Phys. Rev. A55, 900 (1997)

    1997

  40. [47]

    Shor, Fault-tolerant quantum computation, inPro- ceedings of 37th Conference on Foundations of Com- puter Science (1996) pp

    P. Shor, Fault-tolerant quantum computation, inPro- ceedings of 37th Conference on Foundations of Com- puter Science (1996) pp. 56–65

    1996

  41. [49]

    Kitaev, Fault-tolerant quantum computation by anyons, Annals of Physics303, 2 (2003)

    A. Kitaev, Fault-tolerant quantum computation by anyons, Annals of Physics303, 2 (2003)

    2003

  42. [50]

    B. M. Terhal, Quantum error correction for quantum memories, Rev. Mod. Phys.87, 307 (2015)

    2015

  43. [51]

    Aharonov and M

    D. Aharonov and M. Ben-Or, Fault-tolerant quantum computation with constant error rate, SIAM Journal on Computing38, 1207 (2008)

    2008

  44. [52]

    Knill, R

    E. Knill, R. Laflamme, and W. H. Zurek, Threshold ac- curacy for quantum computation, arXiv preprint quant- ph/9610011 (1996)

    1996

  45. [53]

    Preskill, Reliable quantum computers, Proc

    J. Preskill, Reliable quantum computers, Proc. R. Soc. Lond. A.454, 385 (1998)

    1998

  46. [54]

    B. M. Terhal and G. Burkard, Fault-tolerant quantum computation for local non-markovian noise, Phys. Rev. A 71, 012336 (2005)

    2005

  47. [55]

    M. A. Nielsen and C. M. Dawson, Fault-tolerant quan- tum computation with cluster states, Phys. Rev. A71, 042323 (2005)

    2005

  48. [56]

    Aliferis and D

    P. Aliferis and D. W. Leung, Simple proof of fault toler- ance in the graph-state model, Phys. Rev. A73, 032308 (2006)

    2006

  49. [57]

    Aliferis, D

    P. Aliferis, D. Gottesman, and J. Preskill, Quantum accuracy threshold for concatenated distance-3 code, Quantum Info. Comput.6, 97 (2006)

    2006

  50. [58]

    Google Quantum AI and Collaborators, Quantum er- ror correction below the surface code threshold, Nature 638, 920 (2024)

    2024

  51. [59]

    Ryan-Anderson, N

    C. Ryan-Anderson, N. C. Brown, C. H. Baldwin, J. M. Dreiling, C. Foltz, J. P. Gaebler, T. M. Gatterman, N. Hewitt, C. Holliman, C. V. Horst, J. Johansen, D. Lucchetti, T. Mengle, M. Matheny, Y. Matsuoka, K. Mayer, M. Mills, S. A. Moses, B. Neyenhuis, J. Pino, P. Siegfried, R. ...

    2024

  52. [60]

    Bluvstein, S

    D. Bluvstein, S. J. Evered, A. A. Geim, S. H. Li, H. Zhou, T. Manovitz, S. Ebadi, M. Cain, M. Kalinowski, D. Hangleiter, J. P. Bonilla Ataides, N. Maskara, I. Cong, X. Gao, P. Sales Ro- driguez, T. Karolyshyn, G. Semeghini, M. J. Gullans, M. Greiner, V. Vuletić, and M. D. Luki...

    2024

  53. [61]

    and other semiconductor materials [62–64]. Apart from their high error threshold and local con- nectivity, planar surface codes offer the additional advan- tage of allowing the transversal implementation of several logical gates, including all Pauli operators, CNOT, and, up to...

  54. [62]

    Takeda, A

    K. Takeda, A. Noiri, T. Nakajima, T. Kobayashi, and S. Tarucha, Quantum error correction with silicon spin qubits, Nature608, 682 (2022)

    2022

  55. [63]

    van Riggelen, W

    F. van Riggelen, W. I. L. Lawrie, M. Russ, N. W. Hen- drickx, A. Sammak, M. Rispler, B. M. Terhal, G. Scap- pucci, and M. Veldhorst, Phase flip code with semicon- ductor spin qubits, npj Quantum Information 8, 124 (2022)

    2022

  56. [64]

    S. B. Bravyi and A. Y. Kitaev, Quantum codes on a latticewithboundary,arXivpreprintquant-ph/9811052 (1998)

    1998

  57. [65]

    Dennis, A

    E. Dennis, A. Kitaev, A. Landahl, and J. Preskill, Topological quantum memory, Journal of Mathemati- cal Physics43, 4452 (2002)

    2002

  58. [66]

    Bacon, Operator quantum error-correcting subsys- tems for self-correcting quantum memories, Phys

    D. Bacon, Operator quantum error-correcting subsys- tems for self-correcting quantum memories, Phys. Rev. A 73, 012340 (2006)

    2006

  59. [67]

    Loss and D

    D. Loss and D. P. DiVincenzo, Quantum computation with quantum dots, Phys. Rev. A57, 120 (1998)

    1998

  60. [68]

    J. R. Petta, A. C. Johnson, J. M. Taylor, E. A. Laird, A. Yacoby, M. D. Lukin, C. M. Marcus, M. P. Hanson, and A. C. Gossard, Coherent manipulation of coupled electron spins in semiconductor quantum dots, Science 17 309, 2180 (2005)

    2005

  61. [69]

    Takeda, A

    K. Takeda, A. Noiri, T. Nakajima, L. C. Camen- zind, T. Kobayashi, A. Sammak, G. Scappucci, and S. Tarucha, Rapid single-shot parity spin readout in a silicon double quantum dot with fidelity exceeding 99%, npj Quantum Inf.10, 22 (2024)

    2024

  62. [70]

    Mehl and D

    S. Mehl and D. P. DiVincenzo, Simple operation se- quences to couple and interchange quantum information between spin qubits of different kinds, Phys. Rev. B92, 115448 (2015)

    2015

  63. [71]

    Noiri, T

    A. Noiri, T. Nakajima, J. Yoneda, M. Delbecq, P. Stano, T. Otsuka, K. Takeda, S. Amaha, G. Alli- son, K. Kawasaki, et al., A fast quantum interface be- tween different spin qubit encodings, Nat. Commun.9, 1 (2018)

    2018

  64. [72]

    Hetényi and J

    B. Hetényi and J. R. Wootton, Tailoring quantum error correction to spin qubits, Phys. Rev. A 109, 032433 (2024)

    2024

  65. [73]

    Nakajima, M

    T. Nakajima, M. R. Delbecq, T. Otsuka, P. Stano, S.Amaha, J.Yoneda, A.Noiri, K.Kawasaki, K.Takeda, G. Allison, et al., Robust single-shot spin measurement with 99.5% fidelity in a quantum dot array, Phys. Rev. Lett. 119, 017701 (2017)

    2017

  66. [74]

    F. H. L. Koppens, C. Buizert, K. J. Tielrooij, I. T. Vink, K. C. Nowack, T. Meunier, L. P. Kouwenhoven, and L. M. K. Vandersypen, Driven coherent oscillations of a single electron spin in a quantum dot, Nature442, 766 (2006)

    2006

  67. [75]

    Pioro-Ladriere, T

    M. Pioro-Ladriere, T. Obata, Y. Tokura, Y.-S. Shin, T. Kubo, K. Yoshida, T. Taniyama, and S. Tarucha, Electrically driven single-electron spin resonance in a slanting zeeman field, Nat. Phys.4, 776 (2008)

    2008

  68. [76]

    J. M. Elzerman, R. Hanson, L. H. Willems van Beveren, B. Witkamp, L. M. K. Vandersypen, and L. P. Kouwen- hoven, Single-shot read-out of an individual electron spin in a quantum dot, Nature430, 431 (2004)

    2004

  69. [77]

    Levy, Universal quantum computation with spin-1/2 pairs and heisenberg exchange, Phys

    J. Levy, Universal quantum computation with spin-1/2 pairs and heisenberg exchange, Phys. Rev. Lett. 89, 147902 (2002)

    2002

  70. [78]

    Takeda, A

    K. Takeda, A. Noiri, J. Yoneda, T. Nakajima, and S. Tarucha, Resonantly driven singlet-triplet spin qubit in silicon, Phys. Rev. Lett.124, 117701 (2020)

    2020

  71. [79]

    X. Wu, D. R. Ward, J. R. Prance, D. Kim, J. K. Gamble, R. T. Mohr, Z. Shi, D. E. Savage, M. G. La- gally, M. Friesen, S. N. Coppersmith, and M. A. Eriks- son, Two-axis control of a singlet–triplet qubit with an integrated micromagnet, Proceedings of the National Academy of Sci...

    2014

  72. [80]

    Berritta, T

    F. Berritta, T. Rasmussen, J. A. Krzywda, J. van der Heijden, F. Fedele, S. Fallahi, G. C. Gardner, M. J. Manfra, E. van Nieuwenburg, J. Danon, A. Chatterjee, and F. Kuemmeth, Real-time two-axis control of a spin qubit, Nature Communications15, 1676 (2024)

    2024

  73. [81]

    A. E. Seedhouse, T. Tanttu, R. C. Leon, R. Zhao, K. Y. Tan, B. Hensen, F. E. Hudson, K. M. Itoh, J. Yoneda, C. H. Yang, et al. , Pauli blockade in silicon quantum dots with spin-orbit control, PRX Quantum2, 010303 (2021)

    2021

  74. [82]

    A. G. Fowler, M. Mariantoni, J. M. Martinis, and A. N. Cleland, Surface codes: Towards practical large-scale quantum computation, Phys. Rev. A86, 032324 (2012)

    2012

  75. [83]

    A. G. Fowler, A. M. Stephens, and P. Groszkowski, High-threshold universal quantum computation on the surface code, Phys. Rev. A80, 052312 (2009)

    2009

  76. [84]

    F. K. Unseld, B. Undseth, E. Raymenants, Y. Mat- sumoto, S. Karwal, O. Pietx-Casas, A. S. Ivlev, M. Meyer, A. Sammak, M. Veldhorst,et al., Baseband control of single-electron silicon spin qubits in two di- mensions, arXiv preprint arXiv:2412.05171 (2024)

    2024 arXiv

  77. [85]

    Mortemousque, B

    P.-A. Mortemousque, B. Jadot, E. Chanrion, V. Thiney, C. Bäuerle, A. Ludwig, A. D. Wieck, M. Urdampilleta, and T. Meunier, Enhanced spin coherence while displac- ingelectroninatwo-dimensionalarrayofquantumdots, PRX Quantum2, 030331 (2021)

    2021

  78. [86]

    A. S. Rao, D. Buterakos, B. van Straaten, V. John, C.X.Yu, S.D.Oosterhout, L.Stehouwer, G.Scappucci, M. Veldhorst, F. Borsoi, et al. , Modular autonomous virtualization system for two-dimensional semiconduc- tor quantum dot arrays, Physical Review X15, 021034 (2025)

    2025

  79. [87]

    Borsoi, N

    F. Borsoi, N. W. Hendrickx, V. John, M. Meyer, S. Motz, F. Van Riggelen, A. Sammak, S. L. De Snoo, G. Scappucci, and M. Veldhorst, Shared control of a 16 semiconductor quantum dot crossbar array, Nature Nanotechnology 19, 21 (2024)

    2024

  80. [88]

    Bravyi and A

    S. Bravyi and A. Kitaev, Universal quantum computa- tion with ideal clifford gates and noisy ancillas, Phys. Rev. A71, 022316 (2005)

    2005

  81. [89]

    Litinski, Magic State Distillation: Not as Costly as You Think, Quantum3, 205 (2019)

    D. Litinski, Magic State Distillation: Not as Costly as You Think, Quantum3, 205 (2019)

    2019

  82. [90]

    Krinner, N

    S. Krinner, N. Lacroix, A. Remm, A. Di Paolo, E. Genois, C. Leroux, C. Hellings, S. Lazar, F. Swiadek, J. Herrmann, et al., Realizing repeated quantum error correction in a distance-three surface code, Nature605, 669 (2022)

    2022

  83. [91]

    Y. Zhao, Y. Ye, H.-L. Huang, Y. Zhang, D. Wu, H. Guan, Q. Zhu, Z. Wei, T. He, S. Cao,et al. , Re- alization of an error-correcting surface code with super- conducting qubits, Phys. Rev. Lett.129, 030501 (2022)

    2022

  84. [92]

    Google Quantum AI and Collaborators, Suppressing quantum errors by scaling a surface code logical qubit, Nature 614, 676 (2023)

    2023

  85. [93]

    Aliferis and A

    P. Aliferis and A. W. Cross, Subsystem fault tolerance with the bacon-shor code, Phys. Rev. Lett.98, 220502 (2007)

    2007

  86. [94]

    Kribs, R

    D. Kribs, R. Laflamme, and D. Poulin, Unified and gen- eralized approach to quantum error correction, Phys. Rev. Lett.94, 180501 (2005)

    2005

  87. [95]

    Poulin, Stabilizer formalism for operator quantum error correction, Phys

    D. Poulin, Stabilizer formalism for operator quantum error correction, Phys. Rev. Lett.95, 230504 (2005)

    2005

  88. [96]

    M. Li, D. Miller, M. Newman, Y. Wu, and K. R. Brown, 2d compass codes, Phys. Rev. X9, 021041 (2019)

    2019

  89. [97]

    Napp and J

    J. Napp and J. Preskill, Stabilizer formalism for oper- ator quantum error correction, Quantum Inf. Comput. 13 (2013)

    2013

  90. [98]

    Gidney and D

    C. Gidney and D. Bacon, Less Bacon More Threshold, arXiv preprint arXiv:2305.12046 (2023)

    2023 arXiv

  91. [99]

    M. S. Alam, J. Chen, and T. R. Scruby, Bacon-Shor Board Games, arXiv preprint arXiv:2504.02749 (2025)

    2025 arXiv

  92. [100]

    L. Egan, D. M. Debroy, C. Noel, A. Risinger, D. Zhu, D. Biswas, M. Newman, M. Li, K. R. Brown, M. Cetina, and C. Monroe, Fault-tolerant control of an error- corrected qubit, Nature598, 281 (2021). 18

    2021

  93. [101]

    N. M. Linke, M. Gutierrez, K. A. Landsman, C. Fig- gatt, S. Debnath, K. R. Brown, and C. Monroe, Fault- tolerant quantum error detection, Science Advances3, e1701074 (2017)

    2017

  94. [102]

    S.Huang, K.R.Brown,andM.Cetina,ComparingShor and Steane error correction using the Bacon-Shor code, Science Advances10, eadp2008 (2024)

    2024

  95. [103]

    Tomita and K

    Y. Tomita and K. M. Svore, Low-distance surface codes under realistic quantum noise, Phys. Rev. A90, 062320 (2014)

    2014

  96. [104]

    Gottesman, Stabilizer codes and quantum error cor- rection, Ph.D

    D. Gottesman, Stabilizer codes and quantum error cor- rection, Ph.D. thesis, California Institute of Technology (1997)

    1997

  97. [105]

    I. C. Michael Nielsen,Quantum information and quan- tum computation (Cambridge University Press, Cam- bridge, U.K., 2001)

    2001

  98. [106]

    Aaronson and D

    S. Aaronson and D. Gottesman, Improved simulation of stabilizer circuits, Phys. Rev. A70, 052328 (2004)

    2004

  99. [107]

    S.Janardan, Y.Tomita, M.Gutiérrez,andK.R.Brown, Analytical error analysis of clifford gates by the fault- path tracer method, Quantum Information Processing 15, 3065 (2016)

    2016

  100. [108]

    M. Li, M. Gutiérrez, S. E. David, A. Hernandez, and K. R. Brown, Fault tolerance with bare ancillary qubits for a [[7,1,3]] code, Phys. Rev. A96, 032341 (2017)

    2017

  101. [109]

    C. J. Trout, M. Li, M. Gutiérrez, Y. Wu, S.-T. Wang, D. Luan, and K. R. Brown, Simulating the performance of a distance-3 surface code in a linear ion trap, New Journal of Physics20, 043038 (2018)

    2018

  102. [110]

    Gutiérrez, M

    M. Gutiérrez, M. Müller, and A. Bermúdez, Transver- sality and lattice surgery: Exploring realistic routes to- ward coupled logical qubits with trapped-ion quantum processors, Phys. Rev. A99, 022330 (2019)

    2019

  103. [111]

    Escobar-Arrieta and M

    G. Escobar-Arrieta and M. Gutiérrez, Improved perfor- mance of the Bacon-Shor code with Steane’s syndrome extraction method, Phys. Rev. A111, 032427 (2025)

    2025

  104. [112]

    Anders and H

    S. Anders and H. J. Briegel, Fast simulation of stabilizer circuits using a graph-state representation, Phys. Rev. A 73, 022334 (2006)

    2006

  105. [113]

    Gidney, Stim: a fast stabilizer circuit simulator, Quantum 5, 497 (2021)

    C. Gidney, Stim: a fast stabilizer circuit simulator, Quantum 5, 497 (2021)

    2021

  106. [114]

    W. Dür, M. Hein, J. I. Cirac, and H.-J. Briegel, Stan- dard forms of noisy quantum operations via depolariza- tion, Phys. Rev. A72, 052326 (2005)

    2005

  107. [115]

    M. R. Geller and Z. Zhou, Efficient error models for fault-tolerant architectures and the pauli twirling ap- proximation, Phys. Rev. A88, 012314 (2013)

    2013

  108. [116]

    Cai and S

    Z. Cai and S. C. Benjamin, Constructing smaller pauli twirling sets for arbitrary error channels, Sci. Rep.9, 11281 (2019)

    2019

  109. [117]

    Magesan, D

    E. Magesan, D. Puzzuoli, C. E. Granade, and D. G. Cory, Modeling quantum noise for efficient testing of fault-tolerant circuits, Phys. Rev. A87, 012324 (2013)

    2013

  110. [118]

    Gutiérrez, L

    M. Gutiérrez, L. Svec, A. Vargo, and K. R. Brown, Ap- proximation of realistic errors by clifford channels and pauli measurements, Phys. Rev. A87, 030302 (2013)

    2013

  111. [119]

    Puzzuoli, C

    D. Puzzuoli, C. Granade, H. Haas, B. Criger, E. Mage- san, and D. G. Cory, Tractable simulation of error cor- rection with honest approximations to realistic fault models, Phys. Rev. A89, 022306 (2014)

    2014

  112. [120]

    Gutiérrez and K

    M. Gutiérrez and K. R. Brown, Comparison of a quan- tum error-correction threshold for exact and approxi- mate errors, Phys. Rev. A91, 022335 (2015)

    2015

  113. [121]

    Gutiérrez, C

    M. Gutiérrez, C. Smith, L. Lulushi, S. Janardan, and K. R. Brown, Errors and pseudothresholds for incoher- ent and coherent noise, Phys. Rev. A94, 042338 (2016)

    2016

  114. [122]

    Bravyi and A

    S. Bravyi and A. Vargo, Simulation of rare events in quantum error correction, Phys. Rev. A 88, 062308 (2013)

    2013

  115. [123]

    Heußen, D

    S. Heußen, D. Winter, M. Rispler, and M. Müller, Dy- namical subset sampling of quantum error-correcting protocols, Phys. Rev. Res.6, 013177 (2024)

    2024

  116. [124]

    Tansuwannont, B

    T. Tansuwannont, B. Pato, and K. R. Brown, Adaptive syndrome measurements for Shor-style error correction, Quantum 7, 1075 (2023)

    2023

  117. [125]

    Stano and D

    P. Stano and D. Loss, Review of performance metrics of spin qubits in gated semiconducting nanostructures, Nat. Rev. Phys.4, 672 (2022)

    2022

  118. [126]

    Struck, A

    T. Struck, A. Hollmann, F. Schauer, O. Fedorets, A. Schmidbauer, K. Sawano, H. Riemann, N. V. Abrosi- mov, Ł. Cywiński, D. Bougeard,et al., Low-frequency spin qubit energy splitting noise in highly purified 28 si/sige, npj Quantum Inf.6, 1 (2020)

    2020

  119. [127]

    S. G. J. Philips, M. T. Madzik, S. V. Amitonov, S. L. de Snoo, M. Russ, N. Kalhor, C. Volk, W. I. L. Lawrie, D. Brousse, L. Tryputen, B. P. Wuetz, A. Sammak, M. Veldhorst, G. Scappucci, and L. M. K. Vandersypen, Universal control of a six-qubit quantum processor in silicon, Na...

    2022

  120. [128]

    Mills, C

    A. Mills, C. Guinn, M. Feldman, A. Sigillito, M. Gul- lans, M. Rakher, J. Kerckhoff, C. Jackson, and J. Petta, High-Fidelity State Preparation, Quantum Control, and Readout of an Isotopically Enriched Silicon Spin Qubit, Physical Review Applied18, 064028 (2022)

    2022

  121. [129]

    C. Volk, A. Chatterjee, F. Ansaloni, C. M. Marcus, and F. Kuemmeth, Fast charge sensing of si/sige quantum dots via a high-frequency accumulation gate, Nano Lett. 19, 5628 (2019)

    2019

  122. [130]

    D. J. Niegemann, V. El-Homsy, B. Jadot, M. Nur- izzo, B. Cardoso-Paz, E. Chanrion, M. Dartiailh, B. Klemt, V. Thiney, C. Bäuerle, P.-A. Mortemousque, B. Bertrand, H. Niebojewski, M. Vinet, F. Balestro, T. Meunier, and M. Urdampilleta, Parity and Singlet- TripletHigh-FidelityRe...

    2022

  123. [131]

    M. Li, D. Miller, and K. R. Brown, Direct measurement of bacon-shor code stabilizers, Phys. Rev. A98, 050301 (2018)

    2018

  124. [132]

    Yoneda, J

    J. Yoneda, J. Rojas-Arias, P. Stano, K. Takeda, A. Noiri, T. Nakajima, D. Loss, and S. Tarucha, Noise- correlation spectrum for a pair of spin qubits in silicon, Nature Physics19, 1793 (2023)

    2023

  125. [133]

    J. S. Rojas-Arias, A. Noiri, P. Stano, T. Nakajima, J. Yoneda, K. Takeda, T. Kobayashi, A. Sammak, G. Scappucci, D. Loss, et al. , Spatial noise correla- tionsbeyondnearestneighborsin28si/si-gespinqubits, Physical Review Applied20, 054024 (2023)

    2023

  126. [134]

    J. S. Rojas-Arias, Y. Kojima, K. Takeda, P. Stano, T. Nakajima, J. Yoneda, A. Noiri, T. Kobayashi, D. Loss, and S. Tarucha, The origins of noise in the zee- man splitting of spin qubits in natural-silicon devices, arXiv preprint arXiv:2408.13707 (2024)

    2024

  127. [135]

    J. S. Rojas-Arias, A. Noiri, J. Yoneda, P. Stano, T. Nakajima, K. Takeda, T. Kobayashi, G. Scappucci, S. Tarucha, and D. Loss, Inferring charge noise source locationsfromcorrelationsinspinqubits,arXivpreprint arXiv:2505.05875 (2025)

    2025

Pith tools

Reviewed August 15, 2026 · model on record in the stance chip above.