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REVIEW 3 major objections 5 minor 49 references

DYNAMO: Dynamic Neutral Atom Multi-programming Optimizer Towards Quantum Operating Systems

T0 review · 3 major / 5 minor · reviewed 2026-08-06 · deepseek-v4-flash

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Pith's one-line read DYNAMO claims neutral atom arrays can execute several quantum programs concurrently, with up to 14.39x faster compilation and 50.47% fewer execution stages.

desk verdict First real attempt at multi-programming for neutral atoms, but the correctness claim is unsupported because the gate parallelization constraint only forbids coordinate overlap, not blockade-radius proximity. read the letter →

arxiv 2507.04874 v1 pith:4DCNUL52 submitted 2025-07-07 quant-ph cs.ET

Wenjie Sun , Xiaoyu Li , Zhigang Wang , Geng Chen , Lianhui Yu , Guowu Yang This is my paper · ORCID
classification quant-phcs.ET
keywords quantummulti-programmingneutralatomcomputingcompilationAODmovementconstraintsSMTschedulingspatialdeformationmodeloperatingsystemsRydbergstagereduction
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

This paper argues that neutral atom quantum computers can run several independent quantum programs at the same time on one or more atom arrays, and that doing so is the natural step toward a quantum operating system. It introduces DYNAMO, a compiler that schedules circuits together by treating each already-compiled program as a shape occupying space and time on the array. The two technical pieces are a spatial deformation model that respects the order constraints of movable AOD traps and a constraint-based scheduler that places new programs into the gaps left by earlier ones. The reported payoff is up to 14.39x faster compilation than a merged single-circuit baseline and an average 50.47% reduction in Rydberg stages relative to sequential compilation, for circuits from 12 to over 1200 gates.

What carries the argument

The carrying mechanism is cycle-wise spatial deformation: a compiled circuit is decomposed into cycles, each split into an AOD movement step and a non-movement operation step. At every cycle the existing programs' AOD moves partition the array into Order-Preserving Zones, where new rows or columns must not cross the moving trap's path, and Order-Free Zones, where new moves are unconstrained. A second SMT-based scheduler inserts the next circuit into the feasible zones while enforcing the two-qubit gate parallelization constraint, and a greedy length-based scheduler distributes circuits across arrays. This is what lets multiple programs share the same atom array without violating AOD ordering.

What would settle it

Inspect a DYNAMO-produced multi-program schedule and find one Rydberg stage where a qubit belonging to program B lies within the blockade radius of the two-qubit gate pair of program A without occupying their exact coordinates; under a global Rydberg pulse that pair would entangle the wrong atoms, contradicting the correctness claim. If no such configuration exists in any test circuit, the central claim survives this check.

Watch

Extended reading notes

Core claim

The central claim is that multi-programming on dynamically field-programmable neutral atom arrays can be made correct and efficient by decomposing each compiled circuit into cycles, each consisting of an AOD movement step followed by a non-movement operation step, and using the first circuit's movements to define Order-Preserving and Order-Free Zones. A second circuit can then be inserted into the feasible zones at each cycle, with SMT constraints enforcing AOD directionality and gate placement. This dynamic spatial deformation turns the global AOD movement constraint, which blocks naive resource partitioning, into a structured scheduling problem. The paper reports that the method compiles multiple circuits with up to 14.39x speedup over a merged DPQA baseline, reduces Rydberg stages by 50.47% on average versus sequential DPQA, and spreads workloads evenly across multiple QPUs.

Load-bearing premise

The paper assumes that as long as a new gate does not land on the exact coordinates of an existing gate at the same stage, it does not disturb that gate; in reality, any qubit from another program sitting within the Rydberg blockade radius of an executing two-qubit gate pair would be excited too, so the absence of exact overlap is not enough to guarantee correctness.

Editorial extensions

If this is right

  • If correct, several independent quantum circuits can be interleaved on a single neutral atom array with AOD movement order preserved and gate positions kept separate.
  • A quantum operating system could use DYNAMO as its scheduler, deciding which circuits share which array and when, while balancing QPU loads.
  • Shorter-circuit-first scheduling keeps grouped workloads tractable, unlike merged compilation which timed out on all grouped benchmarks within 10,000 seconds.
  • The same compiled circuit can be reused as a space occupation to guide placement of later circuits, reducing Rydberg stages by filling temporal gaps.
  • Balanced multi-resource distribution across two or three QPUs suggests the method extends to larger parallel quantum systems.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • The Appendix B parallelization constraint only forbids exact coordinate equality, not blockade-radius proximity across programs; until separation by at least the Rydberg blockade radius is enforced for all qubits of different programs, the correctness claim may not hold on physical hardware where a global Rydberg pulse would excite any atom inside the blockade region.
  • The headline stage reduction of 50.47% is measured against sequential DPQA, not merged DPQA; a reader weighing absolute circuit depth should also consider the rows where DYNAMO's stage count is higher than the merged baseline.
  • The spatial-deformation idea may transfer to other reconfigurable qubit architectures such as zoned neutral atom processors or ion shuttling systems, but the Order-Preserving/Order-Free distinction would need reformulation for their movement rules.
  • A testable extension is to add an explicit pairwise blockade-radius constraint between all qubits of different programs at every Rydberg stage and measure how much the reported stage reductions shrink; that would separate the scheduling gain from the residual hardware-safety risk.
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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

3 major / 5 minor

Summary. The paper proposes DYNAMO, a multi-programming compilation framework for dynamically field-programmable neutral atom arrays. The method combines a greedy multi-QPU scheduler that assigns circuits to arrays by circuit length (Section III) with an intra-array SMT-based scheduler that uses a cycle-wise decomposition and Order-Preserving/Order-Free Zones (Section IV). Experiments compare DYNAMO against two adaptations of DPQA (sequential and merged) on RevLib, Sabre, and QTetris circuits, reporting up to 14.39× compilation speedup versus merged DPQA and an average Rydberg-stage reduction of 50.47% relative to sequential DPQA. The paper claims that these gains are obtained while maintaining circuit correctness and hardware constraints.

Significance. If the correctness gap identified below were closed, DYNAMO would be a useful first step toward quantum operating systems for neutral atom architectures, and the problem it addresses is relevant. The evaluation uses externally sourced benchmark circuits and measures direct quantities (stage counts, wall-clock compilation time), with no fitted free parameters in the reported aggregate metrics. However, the central claim of correctness under hardware constraints is not established by the formalization in Appendix B, and the absence of a usable artifact prevents independent verification of the quantitative results.

major comments (3)
  1. [Appendix B, Eqs. (9)–(10); Section V-C] The formal two-qubit gate parallelization constraint is incomplete and does not enforce the blockade-radius separation that neutral-atom hardware requires. Equations (9) and (10) only forbid a new gate's qubit coordinate from being exactly equal to an already-scheduled gate's coordinate at the same stage. They never mention the Rydberg blockade radius r_b, nor do they impose any Euclidean distance between the atoms of different programs. In a real device, a two-qubit gate is applied by a global Rydberg pulse, so any atom of another program within r_b of either gate atom will be excited and will participate in the interaction, corrupting both programs. Thus the constraint set admits schedules that are physically invalid, and the claim in Section V-C that DYNAMO achieves multi-programming 'without compromising compilation correctness' is unsupported. The authors must add explicit pairwise distance constraints involving r_b for all concurrently scheduled gate atoms and all atoms of other programs, verify those constraints on the generated schedules, and rerun the experiments, since the reported 50.47% average stage reduction may change materially once the missing constraint is imposed.
  2. [Sections III–IV] The relationship between the width-based greedy scheduler (Algorithm 1) and the SMT scheduler of Section IV is never specified precisely. Algorithm 1 checks only that the number of gates per DAG layer fits within the spatial capacity Wmax; it does not check AOD ordering, OPZ/OFZ membership, or gate parallelization. The paper does not state how the output of Algorithm 1 is fed into the constraint-based scheduler, nor which constraints are active in each phase. As a result, the reader cannot determine whether the grouped multi-program results in Section V-D are produced by the full DYNAMO pipeline and whether those schedules satisfy even the incomplete constraints of Appendix B. The authors should give a precise end-to-end description of the pipeline and explicitly list the constraint set solved at each stage.
  3. [Appendix B and Section V] The statement 'Code available on Github' at the end of Appendix B is not an actionable artifact: no URL, repository identifier, commit, or license is provided, and no solver configuration (r_b, array dimensions, Wmax, per-circuit qubit counts) is given. Without the artifact and configuration, the reported stage counts and compilation times cannot be reproduced, and the possibility that the measured gains derive from the incomplete constraint set of Eqs. (9)–(10) cannot be checked. A revision should supply a complete artifact and an explicit validation of the correctness properties of the emitted schedules.
minor comments (5)
  1. [Table IV] The column labeled 'Speedups(%)' contains values mostly below 1 (for example, 0.37 for Minimal circuits), yet a value below 1 indicates that DYNAMO is slower than the sequential DPQA baseline. This column should be renamed or the ratio inverted and clearly labeled so that 'speedup' is not confused with a time ratio.
  2. [Appendix B, Eqs. (3)–(8)] The index notation in the AOD movement constraints is inconsistent: p and k are mixed, and Eq. (3) writes x^s_{1,i,t,k} where the surrounding text suggests x^s_{1,j,t,p}. The notation should be made uniform.
  3. [Figure 7 caption] The caption labels the proposed method 'NACO' while the text uses 'DYNAMO'; this should be corrected.
  4. [Section III] The text introduces a 'systematic two-phase process' but then lists three phases: initial allocation, incremental assignment, and intra-array refinement. The wording should be adjusted to 'three-phase' or the phases should be regrouped.
  5. [Contributions and Abstract] The phrase 'with the same compilation quality' is used to qualify the speedup claim, but compilation quality is never defined or measured; either define it or remove the qualification.

Circularity Check

0 steps flagged · score 0.0 of 10

The compilation-efficiency claims are measured against external baselines and are not circular; the main gap is an unproven physical-correctness constraint in Appendix B, which is a validation issue rather than a self-referential derivation.

full rationale

The paper's central performance claims (up to 14.39x compilation speedup and 50.47% average stage reduction) are direct measurements of DYNAMO against DPQAs and DPQAc, both documented baseline adaptations of the externally published DPQA compiler [33]. The benchmark circuits are taken from external sources (RevLib, Sabre, QTetris), so the reported numbers are not derived from DYNAMO's own assumptions. No parameter is fitted to the target metrics, and no 'prediction' is renamed from a fit. The variable definitions in Appendix B are explicitly adopted from DPQA [33], which is an external cited result, not the authors' own prior work; the cycle/stage decomposition is presented as an interpretation of post-compilation behavior, not as an empirical discovery. The only serious concern is correctness, not circularity: Equations (9)-(10) require only that a new gate avoid the exact SLM coordinate of an existing gate at the same stage, and they never enforce blockade-radius separation between qubits of different programs, so a global Rydberg pulse could perturb or entangle unintended atoms. The paper also states 'Code available on Github' without providing a repository link, leaving the implementation unverifiable. These are missing-support and correctness gaps, which the scoring rubric explicitly excludes from circularity, so the appropriate circularity score is 0.

Assumptions & free parameters 0 free parameters · 4 assumptions · 1 invented entities

No free parameters are fitted to data: Wmax is a hardware input, circuit-length ordering is a heuristic, and the 10,000 second timeout is an experimental bound. The central model relies on four untested assumptions listed above; no independent physical evidence is provided for the sufficiency of the OPZ/OFZ decomposition.

assumptions (4)
  • domain assumption Neutral atom compilation constraints from DPQA: two-qubit gates require proximity, other qubits must stay outside the blockade radius during gate execution, and AOD rows and columns cannot cross.
    Invoked in Section II-A and Appendix A as hardware facts, not derived inside the paper.
  • domain assumption A compiled stage decomposes into an AOD movement step followed by a non-movement operation step, and circuits align at cycle boundaries.
    Introduced in Section IV and Figure 11; this idealizes timing of independent programs.
  • ad hoc to paper Existing compiled circuits act as fixed OPZ/OFZ obstacles; new circuits need only satisfy pairwise ordering inequalities with each existing movement.
    Section IV and Equations (3)-(8); asserted to 'guarantee' integrity but not proven complete for collision avoidance.
  • ad hoc to paper Two-qubit gate parallelization across programs holds if gate coordinates are distinct; no blockade-radius distance constraint across programs is needed.
    Appendix B Equations (9)-(10); this is the weakest premise and is not physically sufficient.
invented entities (1)
  • Order-Preserving Zone (OPZ) / Order-Free Zone (OFZ) partitioning
    purpose: Models how an already compiled circuit's AOD movements constrain where and how new circuits may move, by dividing the array into constrained directional zones.
    The zones are defined by the paper's own movement constraints; no external measurement or formal proof shows that this zoning fully captures collision-free AOD dynamics.

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Cite this review

Pith. "Pith review of DYNAMO: Dynamic Neutral Atom Multi-programming Optimizer Towards Quantum Operating Systems." pith.science (2026). https://pith.science/paper/4DCNUL52

@misc{pith2026250704874,
  author       = {Pith},
  title        = {Pith review of: DYNAMO: Dynamic Neutral Atom Multi-programming Optimizer Towards Quantum Operating Systems},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/4DCNUL52}},
  note         = {Machine review of arXiv:2507.04874}
}
read the original abstract

As quantum computing advances towards practical applications, quantum operating systems become inevitable, where multi-programming -- the core functionality of operating systems -- enables concurrent execution of multiple quantum programs to enhance hardware utilization. However, most quantum compilation work focuses solely on single-circuit execution, severely limiting resource efficiency and hindering quantum operating system development. We propose Dynamic Neutral Atom Multi-programming Optimizer (DYNAMO), a method that realizes multi-programming on neutral atom quantum architectures through parallel compilation and intelligent resource allocation across multiple quantum processing units (QPUs). DYNAMO addresses two critical challenges: inefficient and difficult resource partitioning, and complex scheduling conflicts from concurrent program. Our method enables efficient spatial and temporal resource sharing while maintaining circuit correctness and hardware constraints. Experimental evaluation across circuits ranging from 12 to over 1200 gates demonstrates that DYNAMO achieves up to 14.39x compilation speedup while reducing execution stages by an average of 50.47%. Furthermore, DYNAMO successfully distributes workloads across multiple QPUs with balanced resource utilization. By enabling efficient multi-programming capabilities, DYNAMO establishes a critical foundation towards realizing practical quantum operating systems.

Figures

Figures reproduced from arXiv: 2507.04874 by the authors.

Figure 1
Figure 1. Comparison of Rydberg stages required and quantum resource utilization with and without multi-programming for circuit compilation. Different [PITH_FULL_IMAGE:figures/full_fig_p004_1.png] view at source ↗
Figure 2
Figure 2. Global impact of moving q0 in dynamically field-programmable neutral atom arrays, with affected regions and qubits highlighted in orange. III. PARALLEL COMPILATION FRAMEWORK FOR DYNAMICALLY FIELD - PROGRAMMABLE NEUTRAL ATOM ARRAYS As described in II-C, in order to address global AOD movement constraints and complex scheduling conflicts in multi-programming scenarios, a new approach to quantum compilation needs to be… view at source ↗
Figure 3
Figure 3. AOD movement in cycle 0. In [PITH_FULL_IMAGE:figures/full_fig_p006_3.png] view at source ↗
Figures from the paper (7 more)
Figure 5
Figure 5. Figure 5: AOD movement in cycle 1 [PITH_FULL_IMAGE:figures/full_fig_p006_5.png]
Figure 6
Figure 6. Figure 6: Atom transfer and two-qubit gate conduction in cycle 1. [PITH_FULL_IMAGE:figures/full_fig_p007_6.png]
Figure 7
Figure 7. Figure 7: Normalized comparison of Rydberg stages between DYNAMO and sequential DPQA on five circuit groups. Each bar represents the total number [PITH_FULL_IMAGE:figures/full_fig_p013_7.png]
Figure 8
Figure 8. Figure 8: Illustration of AOD movement constraint. [PITH_FULL_IMAGE:figures/full_fig_p014_8.png]
Figure 10
Figure 10. Figure 10: Realization of two parallel gates. trap. Since qubits in SLM traps do not require AOD tweezers for maintenance, c1 no longer obstructs c0. Subsequently, as illustrated in [PITH_FULL_IMAGE:figures/full_fig_p015_10.png]
Figure 11
Figure 11. Figure 11: Let the set of n already compiled circuits on the neutral atom array be denoted by Cs = {Cs,1, Cs,2, . . . , Cs,n}. For [PITH_FULL_IMAGE:figures/full_fig_p015_11.png]
Figure 11
Figure 11. Figure 11: Comparasion of Cycle and Stage, Cycle contains extra movement [PITH_FULL_IMAGE:figures/full_fig_p016_11.png]

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Works this paper leans on

49 extracted references · 47 canonical work pages

  1. [1]

    Post-quantum cryptography,

    D. J. Bernstein and T. Lange, “Post-quantum cryptography,” Nature, vol. 549, no. 7671, pp. 188–194, Sep. 2017

    work page 2017

  2. [2]

    Design of a Quantum Walk Circuit to Solve the Subset-Sum Problem,

    G. Lancellotti, S. Perriello, A. Barenghi, and G. Pelosi, “Design of a Quantum Walk Circuit to Solve the Subset-Sum Problem,” in Proceed- ings of the 61st ACM/IEEE Design Automation Conference , ser. DAC ’24. New York, NY , USA: Association for Computing Machinery, Nov. 2024, pp. 1–6

    work page 2024

  3. [3]

    Challenges and opportunities in quantum optimization,

    A. Abbas et al., “Challenges and opportunities in quantum optimization,” Nature Reviews Physics , vol. 6, no. 12, pp. 718–735, Dec. 2024

    work page 2024

  4. [4]

    Towards near-term quantum simulation of materials,

    L. Clinton et al., “Towards near-term quantum simulation of materials,” Nature Communications, vol. 15, no. 1, p. 211, Jan. 2024

    work page 2024

  5. [5]

    Quantum approximate optimization of non- planar graph problems on a planar superconducting processor,

    M. P. Harrigan et al. , “Quantum approximate optimization of non- planar graph problems on a planar superconducting processor,” Nature Physics, vol. 17, no. 3, pp. 332–336, Mar. 2021. [Online]. Available: https://www.nature.com/articles/s41567-020-01105-y

    work page 2021

  6. [6]

    Quantum supremacy using a programmable superconducting processor,

    F. Arute et al. , “Quantum supremacy using a programmable superconducting processor,” Nature, vol. 574, no. 7779, pp. 505–510, Oct. 2019, number: 7779 Publisher: Nature Publishing Group. [Online]. Available: https://www.nature.com/articles/s41586-019-1666-5

    work page 2019

  7. [7]

    Quantum speedup and limitations on matroid property problems,

    X. Huang, J. Luo, and L. Li, “Quantum speedup and limitations on matroid property problems,” Frontiers of Computer Science , vol. 18, no. 4, p. 184905, Dec. 2023

    work page 2023

  8. [8]

    Quantum software framework: A tentative study,

    N. Wu, H. Hu, F. Song, H. Zheng, and X. Li, “Quantum software framework: A tentative study,” Frontiers of Computer Science , vol. 7, no. 3, pp. 341–349, Jun. 2013

    work page 2013

Show all 49 references
  1. [9]

    Quantum operating systems,

    H. Corrigan-Gibbs, D. J. Wu, and D. Boneh, “Quantum operating systems,” in Proceedings of the 16th Workshop on Hot Topics in Operating Systems, 2017, pp. 76–81

    2017

  2. [10]

    Quantum error correction below the surface code threshold,

    R. Acharya et al. , “Quantum error correction below the surface code threshold,” Nature, 2024

    2024

  3. [11]

    A Case for Multi- Programming Quantum Computers,

    P. Das, S. S. Tannu, P. J. Nair, and M. Qureshi, “A Case for Multi- Programming Quantum Computers,” in Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, ser. MICRO ’52. New York, NY , USA: Association for Computing Machinery, Oct. 2019, pp. 291–303

    2019

  4. [12]

    Enabling multi-programming mechanism for quantum computing in the nisq era,

    S. Niu and A. Todri-Sanial, “Enabling multi-programming mechanism for quantum computing in the nisq era,” Quantum, vol. 7, p. 925, 2023

    2023

  5. [13]

    QuCloud: A New Qubit Mapping Mechanism for Multi-programming Quantum Computing in Cloud Environment,

    L. Liu and X. Dou, “QuCloud: A New Qubit Mapping Mechanism for Multi-programming Quantum Computing in Cloud Environment,” in 2021 IEEE International Symposium on High-Performance Computer Architecture (HPCA), Feb. 2021, pp. 167–178

    2021

  6. [14]

    Simultaneous Execution of Quantum Circuits on Current and Near-Future NISQ Systems,

    Y . Ohkura, T. Satoh, and R. Van Meter, “Simultaneous Execution of Quantum Circuits on Current and Near-Future NISQ Systems,” IEEE Transactions on Quantum Engineering , vol. 3, pp. 1–10, 2022

    2022

  7. [15]

    QuCloud+: A Holistic Qubit Mapping Scheme for Single/Multi-programming on 2D/3D NISQ Quantum Computers,

    L. Liu and X. Dou, “QuCloud+: A Holistic Qubit Mapping Scheme for Single/Multi-programming on 2D/3D NISQ Quantum Computers,” ACM Trans. Archit. Code Optim. , vol. 21, no. 1, pp. 9:1–9:27, Jan. 2024

    2024

  8. [16]

    QGroup: Parallel Quantum Job Scheduling Using Dynamic Programming,

    A. Orenstein and V . Chaudhary, “QGroup: Parallel Quantum Job Scheduling Using Dynamic Programming,” in 2024 IEEE International Conference on Quantum Computing and Engineering (QCE) , vol. 01, Sep. 2024, pp. 990–999

    2024

  9. [17]

    QuS- plit: Achieving Both High Fidelity and Throughput via Job Splitting on Noisy Quantum Computers,

    J. Li, Y . Song, Y . Liu, J. Pan, L. Yang, T. Humble, and W. Jiang, “QuS- plit: Achieving Both High Fidelity and Throughput via Job Splitting on Noisy Quantum Computers,” Mar. 2025

    2025

  10. [18]

    High-fidelity parallel entangling gates on a neutral- atom quantum computer,

    S. J. Evered et al., “High-fidelity parallel entangling gates on a neutral- atom quantum computer,” Nature, vol. 622, no. 7982, pp. 268–272, Oct. 2023

    2023

  11. [19]

    Scalable Networking of Neutral-Atom Qubits: Nanofiber-Based Approach for Multiprocessor Fault-Tolerant Quantum Computers,

    S. Sunami, S. Tamiya, R. Inoue, H. Yamasaki, and A. Goban, “Scalable Networking of Neutral-Atom Qubits: Nanofiber-Based Approach for Multiprocessor Fault-Tolerant Quantum Computers,” PRX Quantum , vol. 6, no. 1, p. 010101, Feb. 2025

    2025

  12. [20]

    Quantum computing with neutral atoms,

    L. Henriet, L. Beguin, A. Signoles, T. Lahaye, A. Browaeys, G.-O. Reymond, and C. Jurczak, “Quantum computing with neutral atoms,” Quantum, vol. 4, p. 327, Sep. 2020

    2020

  13. [21]

    Quantum phases of matter on a 256-atom programmable quantum simulator,

    S. Ebadi et al., “Quantum phases of matter on a 256-atom programmable quantum simulator,” Nature, vol. 595, no. 7866, pp. 227–232, Jul. 2021

    2021

  14. [22]

    A quantum processor based on coherent transport of entangled atom arrays,

    D. Bluvstein et al., “A quantum processor based on coherent transport of entangled atom arrays,” Nature, vol. 604, no. 7906, pp. 451–456, Apr. 2022

    2022

  15. [23]

    Logical quantum processor based on reconfigurable atom arrays,

    ——, “Logical quantum processor based on reconfigurable atom arrays,” Nature, vol. 626, no. 7997, pp. 58–65, Feb. 2024

    2024

  16. [24]

    Exploiting long-distance interactions and tolerating atom loss in neutral atom quantum architectures,

    J. M. Baker et al., “Exploiting long-distance interactions and tolerating atom loss in neutral atom quantum architectures,” in Proceedings of the 48th Annual International Symposium on Computer Architecture , ser. ISCA ’21. Virtual Event, Spain: IEEE Press, Nov. 2021, pp. 818–

    2021

  17. [25]

    Timing-Aware Qubit Mapping and Gate Scheduling Adapted to Neutral Atom Quantum Computing,

    Y . Li, Y . Zhang, M. Chen, X. Li, and P. Xu, “Timing-Aware Qubit Mapping and Gate Scheduling Adapted to Neutral Atom Quantum Computing,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems , vol. 42, no. 11, pp. 3768–3780, Nov. 2023, conference Name:...

    2023

  18. [26]

    GRAPHINE: Enhanced Neutral Atom Quantum Computing using Application-Specific Rydberg Atom Arrangement,

    T. Patel, D. Silver, and D. Tiwari, “GRAPHINE: Enhanced Neutral Atom Quantum Computing using Application-Specific Rydberg Atom Arrangement,” in Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis, ser. SC ’23. New York, ...

    2023

  19. [27]

    Qubit Mapping for Reconfigurable Atom Arrays,

    B. Tan, D. Bluvstein, M. D. Lukin, and J. Cong, “Qubit Mapping for Reconfigurable Atom Arrays,” in Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design . San Diego California: ACM, Oct. 2022, pp. 1–9

    2022

  20. [28]

    Compilation for Dynamically Field- Programmable Qubit Arrays with Efficient and Provably Near-Optimal Scheduling,

    D. B. Tan, W.-H. Lin, and J. Cong, “Compilation for Dynamically Field- Programmable Qubit Arrays with Efficient and Provably Near-Optimal Scheduling,” Nov. 2024

    2024

  21. [29]

    Parallax: A Compiler for Neutral Atom Quantum Computers under Hardware Constraints,

    J. Ludmir and T. Patel, “Parallax: A Compiler for Neutral Atom Quantum Computers under Hardware Constraints,” Oct. 2024

    2024

  22. [30]

    Quantum-assisted quantum compiling,

    S. Khatri, R. LaRose, A. Poremba, L. Cincio, A. T. Sornborger, and P. J. Coles, “Quantum-assisted quantum compiling,” Quantum, vol. 3, p. 140, May 2019

    2019

  23. [31]

    SMT-Based Layout Synthesis Approaches for Quantum Circuits,

    Z.-H. Guo and T.-C. Wang, “SMT-Based Layout Synthesis Approaches for Quantum Circuits,” in Proceedings of the 2024 International Sym- posium on Physical Design , ser. ISPD ’24. New York, NY , USA: Association for Computing Machinery, Mar. 2024, pp. 235–243

    2024

  24. [32]

    Scalable Optimal Layout Synthesis for NISQ Quantum Processors,

    W.-H. Lin, J. Kimko, B. Tan, N. Bjørner, and J. Cong, “Scalable Optimal Layout Synthesis for NISQ Quantum Processors,” in 2023 60th ACM/IEEE Des. Autom. Conf. (DAC), Jul. 2023, pp. 1–6. [Online]. Available: https://ieeexplore.ieee.org/document/10247760

    2023

  25. [33]

    Compiling Quantum Circuits for Dynamically Field-Programmable Neutral Atoms Array Processors,

    B. Tan, D. Bluvstein, M. Lukin, and J. Cong, “Compiling Quantum Circuits for Dynamically Field-Programmable Neutral Atoms Array Processors,” Quantum, vol. 8, p. 1281, Mar. 2024

    2024

  26. [34]

    Reuse-Aware Compilation for Zoned Quantum Architectures Based on Neutral Atoms,

    W.-H. Lin, D. B. Tan, and J. Cong, “Reuse-Aware Compilation for Zoned Quantum Architectures Based on Neutral Atoms,” Dec. 2024

    2024

  27. [35]

    Compilation for dynamically field- programmable qubit arrays with efficient and provably near-optimal scheduling,

    D. B. Tan, W.-H. Lin, and J. Cong, “Compilation for dynamically field- programmable qubit arrays with efficient and provably near-optimal scheduling,” in Proceedings of the 30th Asia and South Pacific De- sign Automation Conference . New York, NY , USA: Association for Computi...

    2025

  28. [36]

    Optimal Layout Synthesis for Quantum Comput- ing,

    B. Tan and J. Cong, “Optimal Layout Synthesis for Quantum Comput- ing,” in 2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD), Nov. 2020, pp. 1–9

    2020

  29. [37]

    Optimal qubit mapping with simultaneous gate absorption,

    ——, “Optimal qubit mapping with simultaneous gate absorption,” in 2021 IEEE/ACM Int. Conf. Comput.-Aided Des. (ICCAD) , Nov. 2021, pp. 1–8. [Online]. Available: https://ieeexplore.ieee.org/document/ 9643554

    2021

  30. [38]

    Qubit Mapping and Routing via MaxSAT,

    A. Molavi, A. Xu, M. Diges, L. Pick, S. Tannu, and A. Albarghouthi, “Qubit Mapping and Routing via MaxSAT,” in 2022 55th IEEE/ACM Int. Symp. on Microarchitecture (MICRO) , Oct. 2022, pp. 1078–1091. [Online]. Available: https://ieeexplore.ieee.org/document/9923822

    2022

  31. [39]

    Lightning Talk: Scaling Up Quantum Compilation – Challenges and Opportunities,

    J. Cong, “Lightning Talk: Scaling Up Quantum Compilation – Challenges and Opportunities,” in 2023 60th ACM/IEEE Des. Autom. Conf. (DAC) , Jul. 2023, pp. 1–2. [Online]. Available: https://ieeexplore.ieee.org/document/10247677

    2023

  32. [40]

    Optimal Layout Synthesis for Deep Quantum Circuits on NISQ Processors with 100+ Qubits,

    I. Shaik and J. van de Pol, “Optimal Layout Synthesis for Deep Quantum Circuits on NISQ Processors with 100+ Qubits,” in DROPS-IDN/v2/document/10.4230/LIPIcs.SAT.2024.26, 2024. [Online]. Available: https://drops.dagstuhl.de/entities/document/10.4230/LIPIcs. SAT.2024.26

    2024 doi

  33. [41]

    Scheduling Techniques for GPU Architectures with Processing-In-Memory Capabilities,

    A. Pattnaik et al. , “Scheduling Techniques for GPU Architectures with Processing-In-Memory Capabilities,” in Proceedings of the 2016 International Conference on Parallel Architectures and Compilation , ser. PACT ’16. New York, NY , USA: Association for Computing Machinery, Se...

    2016

  34. [42]

    Portable and transparent software managed scheduling on accelerators for fair resource sharing,

    C. Margiolas and M. F. P. O’Boyle, “Portable and transparent software managed scheduling on accelerators for fair resource sharing,” in Pro- ceedings of the 2016 International Symposium on Code Generation and Optimization, ser. CGO ’16. New York, NY , USA: Association for Comp...

    2016

  35. [43]

    Resource- Aware Task Scheduling,

    M. Tillenius, E. Larsson, R. M. Badia, and X. Martorell, “Resource- Aware Task Scheduling,” ACM Trans. Embed. Comput. Syst. , vol. 14, no. 1, pp. 5:1–5:25, Jan. 2015

    2015

  36. [44]

    HeSP: A Simulation Frame- work for Solving the Task Scheduling-Partitioning Problem on Heteroge- neous Architectures,

    A. Rey, F. D. Igual, and M. Prieto-Mat ´ıas, “HeSP: A Simulation Frame- work for Solving the Task Scheduling-Partitioning Problem on Heteroge- neous Architectures,” in Euro-Par 2016: Parallel Processing, P.-F. Dutot and D. Trystram, Eds. Cham: Springer International Publishing...

    2016

  37. [45]

    Overcommitment in Cloud Services Bin packing with Chance Con- straints,

    C. C, KellerPhilipp, MirrokniVahab, and ZadimoghadddamMorteza, “Overcommitment in Cloud Services Bin packing with Chance Con- straints,” ACM SIGMETRICS Performance Evaluation Review , Jun. 2017

    2017

  38. [46]

    T—ket ⟩: A retargetable compiler for NISQ devices,

    S. Sivarajah, S. Dilkes, A. Cowtan, W. Simmons, A. Edgington, and R. Duncan, “T—ket ⟩: A retargetable compiler for NISQ devices,” Quantum Science and Technology , vol. 6, no. 1, p. 014003, Nov. 2020

    2020

  39. [47]

    Tackling the Qubit Mapping Problem for NISQ-Era Quantum Devices,

    G. Li, Y . Ding, and Y . Xie, “Tackling the Qubit Mapping Problem for NISQ-Era Quantum Devices,” in Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems , ser. ASPLOS ’19. New York, NY , USA: Associa...

    2019

  40. [48]

    RevLib: An Online Resource for Reversible Functions and Reversible Circuits,

    R. Wille, D. Große, L. Teuber, G. W. Dueck, and R. Drechsler, “RevLib: An Online Resource for Reversible Functions and Reversible Circuits,” in 38th International Symposium on Multiple Valued Logic (Ismvl 2008), May 2008, pp. 220–225

    2008

  41. [831]

    Available: https://dl.acm.org/doi/10.1109/ISCA52012

    [Online]. Available: https://dl.acm.org/doi/10.1109/ISCA52012. 2021.00069

    2021

Pith tools

Reviewed August 6, 2026 · model on record in the stance chip above.