Paper Citation Record · LEDGER

Accelerating Transposed Convolutions on FPGA-based Edge Devices

As of 22 August 2026, this Paper Citation Record lists 23 of 23 outbound references and 0 inbound Pith citation observations for arXiv:2507.07683.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2507.07683 v1

Coverage vector

measured 23 of 23 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-08-06T18:40:25.939481Z

measured 23 of 23 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-21T06:32:19.484+00:00

measured 0 of 0 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: cited_works

Reference resolution

23 of 23 outbound references displayed

verified exact3
verified fuzzy17
unresolved3
parse uncertain0
malformed identifier0
metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

Observation fd31f538-896b-45e2-adc0-9c49e93634c3 · outbound

This paper cites Accelerating the Super-Resolution Convolutional Neural Network,.

Accelerating Transposed Convolutions on FPGA-based Edge Devices Accelerating the Super-Resolution Convolutional Neural Network,

Reference 1

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T18:40:26.616789Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation 47cea518-2366-42ba-8197-bd0bf0274197 · outbound

This paper cites Perceptual Losses for Real- Time Style Transfer and Super-Resolution,.

Accelerating Transposed Convolutions on FPGA-based Edge Devices Perceptual Losses for Real- Time Style Transfer and Super-Resolution,

Reference 2

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T18:40:26.607050Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation c0753d01-d789-48a2-a72a-74477793d173 · outbound

This paper cites Generative Modeling for Small-Data Object Detection,.

Accelerating Transposed Convolutions on FPGA-based Edge Devices Generative Modeling for Small-Data Object Detection,

Reference 3

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T18:40:26.598009Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation 8e855679-8c95-44a9-b38a-081916729302 · outbound

This paper cites DLAS: A Conceptual Model for Across-Stack Deep Learning Acceleration,.

Accelerating Transposed Convolutions on FPGA-based Edge Devices DLAS: A Conceptual Model for Across-Stack Deep Learning Acceleration,

Reference 4

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T18:40:26.588698Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation a5bcede5-5e46-4b7d-877a-1852a02d05fc · outbound

This paper cites A survey of FPGA-based accelerators for convolutional neural networks,.

Accelerating Transposed Convolutions on FPGA-based Edge Devices A survey of FPGA-based accelerators for convolutional neural networks,

Reference 5

Resolution: verified exact; doi, observed 2026-08-06T18:40:26.186546Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation ef97ecf8-b972-4229-8b46-036098028224 · outbound

This paper cites A Design Methodology for Efficient Implementation of Deconvolutional Neural Networks on an FPGA.

Accelerating Transposed Convolutions on FPGA-based Edge Devices A Design Methodology for Efficient Implementation of Deconvolutional Neural Networks on an FPGA

Reference 6

Resolution: verified exact; local_arxiv, observed 2026-08-06T18:40:26.345977Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation 3c30fc1d-a07d-4855-bf4d-bfeedbfea3ca · outbound

This paper cites Uni-OPU: An FPGA- Based Uniform Accelerator for Convolutional and Transposed Convo- lutional Networks,.

Accelerating Transposed Convolutions on FPGA-based Edge Devices Uni-OPU: An FPGA- Based Uniform Accelerator for Convolutional and Transposed Convo- lutional Networks,

Reference 7

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T18:40:26.579154Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation ce1bf0be-4b5a-4774-b83c-b6a45d995c7a · outbound

This paper cites An Energy-Efficient FPGA- Based Deconvolutional Neural Networks Accelerator for Single Image Super-Resolution,.

Accelerating Transposed Convolutions on FPGA-based Edge Devices An Energy-Efficient FPGA- Based Deconvolutional Neural Networks Accelerator for Single Image Super-Resolution,

Reference 8

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T18:40:26.569789Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation b75d4b14-8783-4ced-b039-5b4a3cf86f09 · outbound

This paper cites GNA: Reconfigurable and Efficient Architecture for Generative Network Acceleration,.

Accelerating Transposed Convolutions on FPGA-based Edge Devices GNA: Reconfigurable and Efficient Architecture for Generative Network Acceleration,

Reference 9

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T18:40:26.560424Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation 031c24d5-f160-40dc-b030-bae4c05eb9de · outbound

This paper cites An Intermediate-Centric Dataflow for Transposed Convolution Acceleration on FPGA,.

Accelerating Transposed Convolutions on FPGA-based Edge Devices An Intermediate-Centric Dataflow for Transposed Convolution Acceleration on FPGA,

Reference 10

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T18:40:26.550565Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation d65d51e5-b8ea-4818-96ff-01f50d070d6d · outbound

This paper cites FCN-Engine: Accelerating Deconvolutional Layers in Classic CNN Processors,.

Accelerating Transposed Convolutions on FPGA-based Edge Devices FCN-Engine: Accelerating Deconvolutional Layers in Classic CNN Processors,

Reference 11

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T18:40:26.540621Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation 030c448e-bc48-4e42-b387-f5a85ad585f4 · outbound

This paper cites FPGA Design of Transposed Convolutions for Deep Learning Using High-Level Synthesis,.

Accelerating Transposed Convolutions on FPGA-based Edge Devices FPGA Design of Transposed Convolutions for Deep Learning Using High-Level Synthesis,

Reference 12

Resolution: verified exact; doi, observed 2026-08-06T18:40:26.024890Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation 1b09db66-bec4-4f36-a85c-a98b7cac8c72 · outbound

This paper cites an unresolved cited work.

Accelerating Transposed Convolutions on FPGA-based Edge Devices Unresolved cited work

Reference 13

Resolution: unresolved; raw_fallback, observed 2026-08-06T18:40:26.530323Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation 1d4c8c9a-9691-4105-85d4-4f75985a3b82 · outbound

This paper cites SECDA- TFLite: A toolkit for efficient development of FPGA-based DNN accelerators for edge inference,.

Accelerating Transposed Convolutions on FPGA-based Edge Devices SECDA- TFLite: A toolkit for efficient development of FPGA-based DNN accelerators for edge inference,

Reference 14

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T18:40:26.519866Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation 780fa8e3-7acb-4546-9c0b-5218319b61b5 · outbound

This paper cites Unsupervised Representation Learning with Deep Convolutional Generative Adversarial Networks,.

Accelerating Transposed Convolutions on FPGA-based Edge Devices Unsupervised Representation Learning with Deep Convolutional Generative Adversarial Networks,

Reference 15

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T18:40:26.508521Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation bf101087-7ed0-4ceb-b3ab-0207bc5a1375 · outbound

This paper cites SECDA: Efficient Hardware/Software Co-Design of FPGA-based DNN Accelera- tors for Edge Inference,.

Accelerating Transposed Convolutions on FPGA-based Edge Devices SECDA: Efficient Hardware/Software Co-Design of FPGA-based DNN Accelera- tors for Edge Inference,

Reference 16

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T18:40:26.496759Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation 9f08843f-67dd-4213-8fb1-46e7bc2f54f7 · outbound

This paper cites Fully Convolutional Networks for Semantic Segmentation.

Accelerating Transposed Convolutions on FPGA-based Edge Devices Fully Convolutional Networks for Semantic Segmentation

Reference 17

Resolution: unresolved; no resolver link, observed 2026-08-06T18:40:25.556558Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 54a20e60-eec1-4d06-8668-87119c25eee7 · outbound

This paper cites Optimizing CNN-based Segmentation with Deeply Customized Convolutional and Deconvolutional Architectures on FPGA,.

Accelerating Transposed Convolutions on FPGA-based Edge Devices Optimizing CNN-based Segmentation with Deeply Customized Convolutional and Deconvolutional Architectures on FPGA,

Reference 18

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T18:40:26.486072Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation a3571493-8f81-4f1c-ae34-5259f0e2b2c0 · outbound

This paper cites Exploring Effi- cient Acceleration Architecture for Winograd-Transformed Transposed Convolution of GANs on FPGAs,.

Accelerating Transposed Convolutions on FPGA-based Edge Devices Exploring Effi- cient Acceleration Architecture for Winograd-Transformed Transposed Convolution of GANs on FPGAs,

Reference 19

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T18:40:26.475080Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation dcf724df-52e3-4246-ae80-947ff759e237 · outbound

This paper cites Image-to-Image Translation with Conditional Adversarial Networks.

Accelerating Transposed Convolutions on FPGA-based Edge Devices Image-to-Image Translation with Conditional Adversarial Networks

Reference 20

Resolution: unresolved; no resolver link, observed 2026-08-06T18:40:25.811319Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation e32257e9-007c-4bd4-8728-66887afcc180 · outbound

This paper cites Towards Design Methodology of Efficient Fast Algorithms for Accelerating Generative Adversarial Networks on FPGAs,.

Accelerating Transposed Convolutions on FPGA-based Edge Devices Towards Design Methodology of Efficient Fast Algorithms for Accelerating Generative Adversarial Networks on FPGAs,

Reference 21

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T18:40:26.464539Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation 3f4fac3c-7a14-4957-ae1e-7107bd5a2daa · outbound

This paper cites High-Level Synthesis of Hardware Accelerators for Deconvolution Engines,.

Accelerating Transposed Convolutions on FPGA-based Edge Devices High-Level Synthesis of Hardware Accelerators for Deconvolution Engines,

Reference 22

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T18:40:26.453048Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Observation dbc077fa-73f4-4b6b-8d17-70bf0afb4d04 · outbound

This paper cites An Efficient FPGA-Based Dilated and Transposed Convolutional Neural Network Accelerator,.

Accelerating Transposed Convolutions on FPGA-based Edge Devices An Efficient FPGA-Based Dilated and Transposed Convolutional Neural Network Accelerator,

Reference 23

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T18:40:26.442039Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

Pith citing papers

No inbound Pith citation observations are available.