Paper Citation Record · LEDGER

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair

As of 6 August 2026, this Paper Citation Record lists 29 of 29 outbound references and 1 inbound Pith citation observation for arXiv:2507.15664.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2507.15664 v3

Coverage vector

measured 29 of 29 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-05-19T04:10:36.662354Z

measured 30 of 30 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-05T06:32:48.257954+00:00

measured 1 of 1 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links, observed 2026-08-05T18:54:13.805688Z

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: pith, observed 2026-08-05T18:54:16.485449Z

Reference resolution

29 of 29 outbound references displayed

verified exact3
verified fuzzy26
unresolved0
parse uncertain0
malformed identifier0
metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

Observation b02c77e2-b3a1-4fce-8120-7fa902866c0c · outbound

This paper cites Evalu- ating llms for hardware design and test.

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair Evalu- ating llms for hardware design and test

Reference 1

Resolution: verified fuzzy; raw_fallback, observed 2026-05-19T04:12:03.104921Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

Observation e77eb73a-c2cc-4e7d-bc9c-7bf1a38ce465 · outbound

This paper cites Chipmnd: Llms for agile chip design.

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair Chipmnd: Llms for agile chip design

Reference 2

Resolution: verified fuzzy; raw_fallback, observed 2026-05-19T04:12:03.087413Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

Observation 840cd890-77b8-499b-8bd1-6499c8673f7e · outbound

This paper cites Wang, C.-W.

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair Wang, C.-W

Reference 3

Resolution: verified fuzzy; raw_fallback, observed 2026-05-19T04:12:03.079088Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

Observation 1aeebecc-d88d-48cd-a8ec-efb0c89ccc2d · outbound

This paper cites Current issues and emerging techniques for vlsi testing-a review.

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair Current issues and emerging techniques for vlsi testing-a review

Reference 4

Resolution: verified fuzzy; raw_fallback, observed 2026-05-19T04:12:03.076658Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

Observation 94159161-491a-4903-a4c7-c6710e70c5ef · outbound

This paper cites The potential of llms in hardware design.

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair The potential of llms in hardware design

Reference 5

Resolution: verified fuzzy; raw_fallback, observed 2026-05-19T04:12:03.073941Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

Observation e02d842b-c036-4d56-bc5d-dbd54b4dd4d7 · outbound

This paper cites Hardware design and verification with large language models: A literature survey, challenges, and open issues.

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair Hardware design and verification with large language models: A literature survey, challenges, and open issues

Reference 6

Resolution: verified fuzzy; raw_fallback, observed 2026-05-19T04:12:03.134270Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

Observation e185c396-d42c-4629-aa4b-31008ec31f83 · outbound

This paper cites Benchmarking large language models for automated Verilog RTL code generation.

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair Benchmarking large language models for automated Verilog RTL code generation

Reference 7

Resolution: verified fuzzy; raw_fallback, observed 2026-05-19T04:12:03.070981Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

Observation 7c3d4ec9-a01d-4332-90ab-90abaad4e1ce · outbound

This paper cites Chip- Chat: Challenges and opportunities in conversational hardware design.

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair Chip- Chat: Challenges and opportunities in conversational hardware design

Reference 8

Resolution: verified fuzzy; raw_fallback, observed 2026-05-19T04:12:03.113062Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

Observation 2096fc23-d26c-4dac-a203-5b1bfc022d3b · outbound

This paper cites Ver- ilogEval: Evaluating large language models for Verilog code generation.

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair Ver- ilogEval: Evaluating large language models for Verilog code generation

Reference 9

Resolution: verified fuzzy; raw_fallback, observed 2026-05-19T04:12:03.139492Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

Observation c28c05d9-83a1-4a8d-8b4b-a170821801b0 · outbound

This paper cites DeepRTL: Bridging Verilog Understanding and Generation with a Unified Representation Model.

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair DeepRTL: Bridging Verilog Understanding and Generation with a Unified Representation Model

Reference 10

Resolution: verified exact; arxiv_id, observed 2026-05-19T04:12:02.212826Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

Observation eb763f17-06c6-48d0-b171-5590dbc2d541 · outbound

This paper cites CodeV: Empowering LLMs with HDL Generation through Multi-Level Summarization.

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair CodeV: Empowering LLMs with HDL Generation through Multi-Level Summarization

Reference 11

Resolution: verified exact; arxiv_id, observed 2026-05-19T04:12:02.209092Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

Observation 869e96b3-549f-40fd-955c-d8658dd135db · outbound

This paper cites LLM for complex signal processing in FPGA- based software defined radios: A case study on FFT.

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair LLM for complex signal processing in FPGA- based software defined radios: A case study on FFT

Reference 12

Resolution: verified fuzzy; raw_fallback, observed 2026-05-19T04:12:03.121236Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

Observation 8d614042-08f9-466b-962b-2ed95b064ce6 · outbound

This paper cites Verigen: A large language model for Verilog code generation.

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair Verigen: A large language model for Verilog code generation

Reference 13

Resolution: verified fuzzy; raw_fallback, observed 2026-05-19T04:12:03.123780Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

Observation cb33c995-bd58-42c1-94a4-92736b954fc7 · outbound

This paper cites A secure DFT architecture protecting crypto chips against scan-based attacks.

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair A secure DFT architecture protecting crypto chips against scan-based attacks

Reference 14

Resolution: verified fuzzy; raw_fallback, observed 2026-05-19T04:12:03.115530Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

Observation 6816bb57-7fab-4b4d-b856-518cfb69257d · outbound

This paper cites End-to-end testing for boards and systems using boundary scan.

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair End-to-end testing for boards and systems using boundary scan

Reference 15

Resolution: verified fuzzy; raw_fallback, observed 2026-05-19T04:12:03.118150Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

Observation ad9574d1-e406-47f6-87a2-fcf61b611bcf · outbound

This paper cites Design for testability and built-in self test: a review.

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair Design for testability and built-in self test: a review

Reference 16

Resolution: verified fuzzy; raw_fallback, observed 2026-05-19T04:12:03.126391Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

Observation 0e42872a-5dde-424f-b195-f66192d5a74c · outbound

This paper cites The im- plementation of ieee std 1149.1 boundary scan test strategy within a cellular infrastructure production envi- ronment.

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair The im- plementation of ieee std 1149.1 boundary scan test strategy within a cellular infrastructure production envi- ronment

Reference 17

Resolution: verified fuzzy; raw_fallback, observed 2026-05-19T04:12:03.128843Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

Observation bffa8ff1-2db2-419e-bba5-5198478faf94 · outbound

This paper cites Retrieval-augmented generation for knowledge- intensive NLP tasks.

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair Retrieval-augmented generation for knowledge- intensive NLP tasks

Reference 18

Resolution: verified fuzzy; raw_fallback, observed 2026-05-19T04:12:03.136728Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

Observation 2fda199b-915a-44bd-81ae-067b28378fde · outbound

This paper cites Design and implementation of a motion controller for XYZ table based on multiprocessor SoPC.

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair Design and implementation of a motion controller for XYZ table based on multiprocessor SoPC

Reference 19

Resolution: verified fuzzy; raw_fallback, observed 2026-05-19T04:12:03.107695Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

Observation 5f9bcd74-5d92-447a-b4d0-5a392028d874 · outbound

This paper cites End-to-end deep learning framework for printed circuit board manufac- turing defect classification.

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair End-to-end deep learning framework for printed circuit board manufac- turing defect classification

Reference 20

Resolution: verified fuzzy; raw_fallback, observed 2026-05-19T04:12:03.131428Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

Observation 709516f0-f9a7-4319-99ad-89c74837bb81 · outbound

This paper cites Deep learning-based integrated circuit surface defect detection: Addressing information density imbalance for industrial application.

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair Deep learning-based integrated circuit surface defect detection: Addressing information density imbalance for industrial application

Reference 21

Resolution: verified fuzzy; raw_fallback, observed 2026-05-19T04:12:03.096134Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

Observation 1076a526-b91d-49f5-aa35-452fa1145824 · outbound

This paper cites A timing engine inspired graph neural network model for pre-routing slack prediction.

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair A timing engine inspired graph neural network model for pre-routing slack prediction

Reference 22

Resolution: verified fuzzy; raw_fallback, observed 2026-05-19T04:12:03.099105Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

Observation 39779b51-c822-4b1f-ab9d-844460015f39 · outbound

This paper cites A deep learn- ing based power estimations mechanism for CMOS VLSI circuit.

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair A deep learn- ing based power estimations mechanism for CMOS VLSI circuit

Reference 23

Resolution: verified fuzzy; raw_fallback, observed 2026-05-19T04:12:03.093210Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

Observation 0ec5b86c-3b06-4691-99a1-da51a93767cc · outbound

This paper cites A survey on software clone detection research.

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair A survey on software clone detection research

Reference 24

Resolution: verified fuzzy; raw_fallback, observed 2026-05-19T04:12:03.102159Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

Observation 5b6b099f-16c1-4253-a0c1-0bc0b49a37e6 · outbound

This paper cites A survey on clone refactoring and tracking.

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair A survey on clone refactoring and tracking

Reference 25

Resolution: verified fuzzy; raw_fallback, observed 2026-05-19T04:12:03.110303Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

Observation 74e6dcb4-08c2-48c8-9ce2-c44a88365ddd · outbound

This paper cites Benchmarking large lan- guage models for automated verilog rtl code generation.

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair Benchmarking large lan- guage models for automated verilog rtl code generation

Reference 26

Resolution: verified fuzzy; raw_fallback, observed 2026-05-19T04:12:03.090246Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

Observation be24d8ee-b582-42c8-b954-dabf75ac733d · outbound

This paper cites Chemist-X: Large Language Model-empowered Agent for Reaction Condition Recommendation in Chemical Synthesis.

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair Chemist-X: Large Language Model-empowered Agent for Reaction Condition Recommendation in Chemical Synthesis

Reference 27

Resolution: verified exact; arxiv_id, observed 2026-05-19T04:12:02.204723Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

Observation 3bb32003-d8d0-40fe-99c9-5b742247c8ba · outbound

This paper cites Su- pervised contrastive learning.

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair Su- pervised contrastive learning

Reference 28

Resolution: verified fuzzy; raw_fallback, observed 2026-05-19T04:12:03.081513Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

Observation f6cb610d-437e-47f2-918f-2c225068dfa9 · outbound

This paper cites A con- trastive learning approach for training variational autoen- coder priors.

VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair A con- trastive learning approach for training variational autoen- coder priors

Reference 29

Resolution: verified fuzzy; raw_fallback, observed 2026-05-19T04:12:03.084537Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.

Pith citing papers

Observation ff156233-00cc-4dbf-b2c9-b1bd31d3d3cb · inbound

LLM-Powered Virtual Patient Agents for Interactive Clinical Skills Training with Automated Feedback cites this paper.

LLM-Powered Virtual Patient Agents for Interactive Clinical Skills Training with Automated Feedback VeriRAG: A Retrieval-Augmented Framework for Automated RTL Testability Repair

Reference 17

Resolution: verified exact; local_arxiv, observed 2026-08-05T18:54:16.578247Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.