Recurrent Deep Differentiable Logic Gate Networks

Andreas Plesner; Roger Wattenhofer; Simon B\"uhrer; Till Aczel

REVIEW 4 major objections 8 minor 3 cited by

Recurrent Deep Differentiable Logic Gate Networks

T0 review · 4 major / 8 minor · reviewed 2026-08-05 · deepseek-v4-flash

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Pith's one-line read A recurrent network built entirely from differentiable Boolean logic gates can translate English to German, reaching 5.00 BLEU versus 5.41 for a GRU on a truncated WMT'14 test, and keeps 4.39 BLEU after collapsing to pure Boolean inference.

desk verdict A genuine proof-of-concept for recurrent logic gate networks, but the headline GRU comparison is unanchored and the paper has internal contradictions that need fixing. read the letter →

arxiv 2508.06097 v1 pith:A5PLWQVI submitted 2025-08-08 cs.LG

Simon Bührer , Andreas Plesner , Till Aczel , Roger Wattenhofer This is my paper

classification cs.LG

keywords recurrentdifferentiablelogicgatenetworkssequence-to-sequencelearningneuralmachinetranslationBooleangatesWMT-14English-GermanGRUbaselinebinarycollapseFPGAacceleration

verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

The paper tries to establish that differentiable logic gate networks—which replace floating-point arithmetic with learned mixtures of Boolean gates—can be made recurrent and perform sequence-to-sequence learning. It introduces RDDLGN, the first recurrent version of DDLGN, and tests it on WMT'14 English-German translation restricted to 16-token sequences and a shared 16,000-token vocabulary. The uncollapsed model scores 5.00 BLEU (30.9% accuracy), sitting between an RNN baseline (4.59) and a GRU baseline (5.41); after rounding to a fully Boolean 'collapsed' network it degrades to 4.39 BLEU. If the result holds, logic-based recurrence is a viable substrate for translation and other sequential tasks, with a concrete path to FPGA acceleration. The paper also shows the RDDLGN decoder keeps high accuracy when target tokens are shifted far from inputs, suggesting a strong positional memory.

What carries the argument

The load-bearing object is the recurrent logic layer: a logic layer whose input at time $t$ is the concatenation of the current token representation and the layer group's own output from time $t-1$ (the K-group in the encoder, the P-group in the decoder). Each neuron in a logic layer computes a softmax-weighted mixture of all 16 two-input Boolean gates, with continuous surrogates such as $x_1 x_2$ for AND and $x_1 + x_2 - x_1 x_2$ for OR; training also uses sigmoid-binarized embeddings with a binary-regularization term. After training, argmax gate selection and Heaviside embeddings 'collapse' the network to pure Boolean logic, which is what makes FPGA implementation plausible.

What would settle it

Run RDDLGN, GRU, and RNN with, say, 10 random seeds each under the paper's exact configuration and report BLEU means with 95% confidence intervals. If the 0.41 BLEU gap between RDDLGN and GRU falls inside the interval, or RDDLGN does not significantly beat RNN, the central 'approaching GRU' claim fails. A second check: train the same RDDLGN on sequences longer than 16 tokens and with a subword vocabulary; the paper's own ablations show accuracy collapses to 7.56% at 64 tokens and 11.08% with subword tokenization, so success there would be needed to establish general sequence viability.

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Extended reading notes

Core claim

The central claim is that recurrence can be implemented inside a differentiable logic gate network by making two layer groups stateful: K-layers in the encoder propagate a hidden state across time steps, and P-layers in the decoder combine the previous decoder state, the context vector, and the embedded target token. These recurrent logic groups are trained end-to-end with the standard DDLGN relaxation—each neuron soft-mixes all 16 two-input Boolean gates, with AND and OR replaced by smooth surrogates—plus an auxiliary loss that pushes embeddings toward binary values. At inference the model can be collapsed to a fully Boolean network by selecting each neuron's argmax gate and thresholding em

Load-bearing premise

The claim that RDDLGN 'approaches GRU' rests on the assumption that a single run of each model on a 16-token truncated, 16,000-word-vocabulary WMT'14 task, with no attention or beam search, produces BLEU differences that are meaningful signal rather than run-to-run noise.

Editorial extensions

If this is right

If RDDLGN is right, sequence-to-sequence models do not need floating-point multiply-accumulate; a Boolean network can carry the recurrent computation, so translation and similar tasks become candidates for FPGA synthesis and low-power inference.
The collapsed model's 4.39 BLEU (against 5.00 uncollapsed) shows the discretization gap is small enough that the practical Boolean model stays near the learned one, a property that makes hardware deployment plausible.
RDDLGN's decoder memorization result—97%+ accuracy for shifts up to 4 and 64.6% at shift 12, versus 28.1% for GRU—suggests logic recurrence stores temporal context in a way that resists shift-induced forgetting, which could matter for long-range tasks.
The architecture provides a template for adding recurrence to other logic-based networks: any differentiable logic layer group can be made stateful by feeding its own previous output back in, so the principle extends beyond this encoder-decoder design.
The embedding-heavy parameter count (16.384M of 40.8M) and the small collapsed non-embedding size (1.53M) imply that the logic part itself is efficient once embeddings are solved; the next bottleneck is embedding representation, not logic computation.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

A testable extension is to repeat the headline comparison with several random seeds and report confidence intervals; the 0.41 BLEU gap to GRU sits within the spread of ablations in the paper's own Table 2, so the 'approaching GRU' claim could be run-to-run noise.
The paper's ablations show the model degrades sharply at sequence length 64 (7.56% accuracy) and with subword tokenization (11.08%); this suggests RDDLGN's viability on realistic translation settings is untested, and a natural experiment would be scaling to longer sequences with a wordpiece vocabulary.
The memorization result may reflect a positional-copy bias rather than linguistic generalization; probing with shuffled word order or nonce words would separate memorization from translation ability.
Because the collapsed network is 1.53M non-embedding parameters and fully Boolean, an actual FPGA or CPU bitwise implementation is a concrete next experiment the paper motivates but does not run.

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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Desk Editor's Note

read the letter

The short version: this is a real first step—someone has finally built a recurrent version of differentiable logic gate networks and trained it on a sequence task. The architecture is described clearly, and the hyperparameter sweep is more thorough than most papers of this type. But the central claim that RDDLGN 'approaches GRU performance' is not properly anchored. The 5.00 vs 5.41 BLEU gap comes from a table with no error bars, and the abstract labels the number as 'during training' while Figure 3 says test. That ambiguity must be resolved before the claim means anything.

The good parts: Recurrent DDLGN is a sensible extension of Petersen et al., and the paper is honest that it's a proof-of-concept. The encoder's K-layers and decoder's P-layers are a reasonable way to add recurrence. The ablation study in Table 6 reports means and standard deviations across three seeds; that's real discipline. The collapsed model's parameter count outside the embeddings (1.5M) is interesting and worth remembering. The shift-task memorization probe is a nice idea, though I'm suspicious of the baselines there.

The soft spots, in order: First, the main comparison has no variance. Their own Table 2 shows BLEU standard deviations around 0.33 for the BASE model, same order as the 0.41 gap between RDDLGN and GRU. Without repeated runs, the central claim could be noise. Second, the paper contradicts itself on vanishing gradients: Section 5.5 says the model shows 'absence of vanishing or exploding gradients,' while Section 6 says it 'suffers from vanishing gradient problems.' Both cannot be true. Third, Section 4.1 says the hidden state is initialized with Gaussian noise, but Table 7 says Gaussian initialization is detrimental and the baseline uses something else. Fourth, no code or checkpoints are provided.

Beyond these fixable issues, the evaluation is a toy setup: 16-token sequences, word-level 16k vocabulary, no attention, no beam search. BLEU around 5 is far from usable translation. The paper would be stronger if it framed the result as 'a recurrent logic network can learn a sequential mapping on a small, controlled benchmark' rather than 'approaching GRU.'

Who is this for? Researchers working on logic-based neural computation, FPGA-friendly inference, or alternative recurrent architectures. They'll find the architecture and the ablation useful. A general ML audience can skip it.

Recommendation: it deserves a serious referee, but the referee should ask for major revisions: fix the training/test labels, add seed info to the main table, resolve the vanishing-gradient contradiction, and reconcile the initialization text with the table. If those are addressed, it would be a solid workshop-level contribution.

Referee Report

4 major / 8 minor

Summary. The paper introduces RDDLGN, a recurrent encoder-decoder architecture in which the dense layers of an RNN-style model are replaced by differentiable logic gate layers. The model is trained on WMT'14 English-German with sequences truncated to 16 tokens and a shared 16k word-level vocabulary. The reported results are 5.00 BLEU / 30.9% accuracy for the uncollapsed RDDLGN, degrading to 4.39 BLEU / 27.7% after Boolean collapse, compared with GRU (5.41 / 34.2%), RNN (4.59 / 29.6%), and Transformer (5.98 / 35.3%) baselines. The paper also reports a delayed-copy task and final-step gradient statistics, and contains extensive hyperparameter ablations with three seeds.

Significance. If the headline comparison is reliable, this is the first demonstration that a recurrent logic-gate network can perform sequence-to-sequence learning, and the graceful degradation under Boolean collapse is a useful proof-of-concept for FPGA-oriented inference. The controlled hyperparameter studies with three seeds (Tables 2, 6-9) are a strength, as is the explicit reporting of parameter counts with and without embeddings. However, the central quantitative claim that RDDLGN 'approaches GRU performance' is not yet anchored: the evaluation split is ambiguous, the headline Table 3 has no uncertainty, and no energy/latency measurements are provided despite the efficiency motivation. The paper currently supports a proof-of-concept stronger than 'not trainable,' but the specific comparison against GRU needs additional empirical support.

major comments (4)

[Abstract; §5.3, Table 3, Figure 3] The headline comparison is not anchored to a clearly defined evaluation split. The abstract reports '5.00 BLEU and 30.9% accuracy during training,' while Figure 3 labels the same values as 'test BLEU score, perplexity, and accuracy,' and Table 3's caption and §5.3 do not state which split is being reported. If the 5.00 BLEU / 30.9% accuracy are training or validation numbers, comparing them with the GRU test BLEU of 5.41 is invalid. Please state the split for every table and figure, and if 'during training' is intended to mean the uncollapsed model rather than the training set, say so explicitly.
[Table 3; §5.3] The central quantitative claim that RDDLGN 'approaches GRU performance' rests on a 0.41 BLEU gap (5.00 vs. 5.41). Table 3 reports no error bars or seed counts. The paper's own controlled hyperparameter studies use three seeds and report BLEU standard deviations of roughly 0.1-0.3 (e.g., Table 2 BASE: 3.59 ± 0.33; Table 6), which is the same order as this gap. Without repeated runs and a statement of variability for the final configurations, the differences among RDDLGN (5.00), RNN (4.59), and GRU (5.41) cannot be distinguished from run-to-run noise. Please report mean ± standard deviation over at least 3 seeds for Table 3, and ideally a bootstrap confidence interval or paired significance test.
[Table 3; §5.3; §6] The efficiency motivation is not supported by any measured efficiency metric. RDDLGN has 40.8M trainable parameters versus 16.0M for the Transformer, 9.0M for the GRU, and 8.5M for the RNN; even the collapsed model is 17.91M total (including 16.384M embedding parameters) versus 9.0M for the GRU. The abstract and introduction motivate logic-gate networks by compute and energy efficiency, but the paper reports no latency, FLOP, active-gate, or energy measurements for the recurrent model. The 'without embeddings' parameter counts in Table 4 are not a substitute for runtime measurements. Please provide actual inference-cost measurements or soften the efficiency claims.
[§5.5 vs. §6] The gradient claims are internally inconsistent. Section 5.5 concludes that the results 'confirm the absence of vanishing or exploding gradients' and describe 'robust and uniform gradient flow throughout all layer groups,' while Section 6 states that 'the architecture suffers from vanishing gradient problems, particularly for longer sequences and deeper layer configurations.' Moreover, Table 5 shows mean final gradient magnitudes varying from 8.82e3 (N0) to 1.20e5 (M5), so a constant std/mean ratio alone does not establish uniform scaling across layers. Please reconcile these statements and report gradient norms over the course of training, not only at the final step.

minor comments (8)

[§5.1] The training data is described as '4.5 million sentence pairs (Patterson et al. 2021)'; this citation is for carbon emissions analysis, not the WMT'14 dataset. Please cite Bojar et al. (2014) for the dataset.
[Figure 2] Figure 2 shows 'S = 3 timesteps' while §4.1 and §5.1 define and use S = 16. Please make the figure consistent with the experiments.
[Table 2 vs. Table 6/7] Terminology is inconsistent: Table 2's caption says 'validation set,' Table 6's caption says 'test performance,' and Table 7 says 'validation mean ± standard deviation.' Please unify the wording and state which split each ablation reports.
[Figure 3 and Table 3] The collapsed model is called 'RDDLGN*' in Figure 3 and 'Collapsed' in Table 3. Use one consistent notation.
[Section 3; Appendix A.3] The GroupSum formula includes a temperature 1/τ, but τ is not defined in Section 3. The appendix later introduces a GroupSum temperature with a different-looking expression. Please define τ consistently.
[§5.4 and Figure 4] The task is described as a 'memorization' test, but it is a delayed-copy / shifted language-modeling task. Please clarify whether this measures memory or the ability to copy with a delay.
[Table 3] The accuracy metric is not defined. State whether it is token-level accuracy excluding padding tokens, and whether it is computed on the same split as BLEU.
[Reproducibility] No code, checkpoints, or preprocessing pipeline are released. Given that the empirical comparison is the main contribution, releasing these would substantially increase confidence in the reported numbers.

Circularity Check

0 steps flagged · score 0.0 of 10

No significant circularity: RDDLGN's claims rest on external empirical comparison, not on self-referential derivation.

full rationale

The paper's central claim is empirical: a recurrent logic-gate architecture is trained on WMT'14 and compared against independently trained RNN/GRU/Transformer baselines. No quantity is defined in terms of the target result: BLEU and accuracy are computed from standard held-out evaluation, not from training losses or fitted constants. The architecture and hyperparameters are chosen via validation-set experiments (Section 5.2, Appendix A), but Table 3 reports model comparisons on the test benchmark; selecting hyperparameters on a validation split and then evaluating on test is standard and not circular. The only same-lab citation (Yousefi et al. 2025, co-authored by Plesner, Aczel, and Wattenhofer) is invoked as background for the discretization-gap auxiliary loss; it is not the load-bearing premise for the recurrent-logic feasibility claim, which is independently supported by the baseline comparisons and the shift-task memorization experiment. The abstract's phrase 'during training' versus Figure 3's 'test' labeling is an evaluation-reporting ambiguity, but it does not make any derivation self-referential. Therefore no circular step is present.

Assumptions & free parameters 6 free parameters · 5 assumptions · 0 invented entities

The central claim rests on hyperparameter choices selected from validation experiments, on the DDLGN relaxation imported from prior work, and on an evaluation protocol that compresses WMT14 to 16-token word-level sentences. No new physics-like entity is introduced. The main unstated burden is the assumption that the chosen benchmark and the chosen baselines make the small BLEU difference meaningful.

free parameters (6)

Layer sizes for N,K,L,P,M groups = N [12K,12K]; K [54K,32K]; L [12K,12K]; P [64K,48K]; M [400K,400K,480K]
Chosen by hyperparameter search on a 10% WMT14 validation setup (Table 6); every reported headline metric depends on this selection.
Embedding dimension d_emb = 1024
Set 4x larger than baselines because inputs are sigmoid-binarized; selected from Table 6 rows F, with F3 at 1536 slightly higher but within uncertainty.
Group factor k = 30
GroupSum grouping over 480K M-layer outputs; Table 6 rows G show the largest sensitivity in the study, so this number materially affects accuracy.
Sequence length S = 16
Table 2 shows 8-token sequences give 27.23% accuracy and 16-token is the base; truncation to 16 tokens discards most long-context information in WMT14.
Vocabulary size and sharing = 16,000 shared
Table 2 rows B show 8k shared achieves 30.01% accuracy while 16k shared gives 23.28%; the chosen value is a compromise, not derived.
Training hyperparameters = lr 0.05, wd 0.001, label smoothing 0.1, group-sum tau 1, auxiliary ramp w 0 to 0.1 over 1K-100K steps
Selected from appendix tables on a small validation setup; no derivation connects these values to the central claim.

assumptions (5)

domain assumption Relaxed DDLGN gates and softmax gate selection remain trainable and produce useful gradients
RDDLGN relies entirely on the Petersen et al. 2022 relaxation; the present paper provides no proof that the soft gate mixture preserves gradient information through recurrence.
ad hoc to paper 16-token truncation and a word-level 16k shared vocabulary produce a task that measures sequence modeling ability
The paper's own Table 2 shows extreme sensitivity to sequence length and vocabulary, and all models score only 5-6 BLEU, so this task choice is load-bearing.
domain assumption Collapsed Boolean inference preserves the recurrent model's behavior
The paper measures 4.39 vs 5.00 BLEU for the collapse, but prior collapse evidence comes from feedforward DDLGNs; no guarantee is given for recurrent state propagation.
domain assumption Sigmoid embeddings plus the L_emb regularization yield binary-like inputs without crippling gradients
The auxiliary loss is scheduled ad hoc with weights 0 to 0.1 and no gradient guarantee is provided.
ad hoc to paper Recurrent hidden states initialized with Gaussian noise are a valid choice
Section 4.1 says Gaussian initialization is used, but Table 7 indicates Gaussian hidden-state initialization degrades performance relative to residual initialization. The manuscript does not reconcile this.

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Cite this review

Pith. "Pith review of Recurrent Deep Differentiable Logic Gate Networks." pith.science (2026). https://pith.science/paper/A5PLWQVI

@misc{pith2026250806097,
  author       = {Pith},
  title        = {Pith review of: Recurrent Deep Differentiable Logic Gate Networks},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/A5PLWQVI}},
  note         = {Machine review of arXiv:2508.06097}
}

read the original abstract

While differentiable logic gates have shown promise in feedforward networks, their application to sequential modeling remains unexplored. This paper presents the first implementation of Recurrent Deep Differentiable Logic Gate Networks (RDDLGN), combining Boolean operations with recurrent architectures for sequence-to-sequence learning. Evaluated on WMT'14 English-German translation, RDDLGN achieves 5.00 BLEU and 30.9\% accuracy during training, approaching GRU performance (5.41 BLEU) and graceful degradation (4.39 BLEU) during inference. This work establishes recurrent logic-based neural computation as viable, opening research directions for FPGA acceleration in sequential modeling and other recursive network architectures.

Figures

Figures reproduced from arXiv: 2508.06097 by the authors.

**Figure 2.** Architecture of the Recurrent Deep Differentiable Logic Gate Networks ( [PITH_FULL_IMAGE:figures/full_fig_p004_2.png] view at source ↗

**Figure 3.** Comparison of test BLEU score, perplexity, and [PITH_FULL_IMAGE:figures/full_fig_p006_3.png] view at source ↗

Figures from the paper (1 more)

**Figure 4.** Figure 4: Test accuracy versus shift factor for different neural [PITH_FULL_IMAGE:figures/full_fig_p007_4.png]

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Forward citations

Cited by 3 Pith papers

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score.

On the Stability and Realizability of Recurrent Polynomial Surrogate Ternary Logic Gate Networks
cs.LG 2026-05 unverdicted novelty 7.0 of 10

R-DTLGN is a recurrent ternary logic network that hardens polynomial surrogates to monotone-gate circuits, links STL bounded operators to AND/OR connections for stability and principled abstention, and uses a formula-...
Fully Trainable Deep Differentiable Logic Gate Networks and Lookup Table Networks
cs.LG 2026-07 conditional novelty 6.5 of 10

Training connections as well as gate/LUT functions lets deep logic-gate and lookup-table networks match fixed-wiring accuracy with far fewer gates (e.g. 8k vs ~384k on MNIST).
Differentiable Weightless Controllers: Learning Logic Circuits for Continuous Control
cs.LG 2025-12 conditional novelty 6.0 of 10

Logic-gate circuits trained with gradient descent can match neural-network policies on most MuJoCo continuous-control tasks and run on FPGAs in a few clock cycles.

Reference graph

Works this paper leans on

4 extracted references · 1 canonical work pages · cited by 3 Pith papers

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Reviewed August 5, 2026 · model on record in the stance chip above.

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