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REVIEW 3 major objections 4 minor 41 references

Introducing the Quantum Economic Advantage Online Calculator

T0 review · 3 major / 4 minor · reviewed 2026-08-05 · deepseek-v4-flash

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Pith's one-line read The paper introduces an open-access online calculator that predicts when quantum computers will outperform cost-equivalent classical ones for a given problem, finding RSA-2048 break years around 2028–2034 and highly sensitive dates for Grov

desk verdict Useful tool paper with a reproducible numerical bug: the hardware slowdown numbers are 100x off from the stated formula, so Table III years should not be taken at face value. read the letter →

arxiv 2508.21031 v1 pith:MPUXZMOK submitted 2025-08-28 quant-ph

Frederick Mejia , Hans Gundlach , Jayson Lynch , Carl Dukatz , Andrew Lucas , Eleanor Crane , Prashant Shukla , Neil Thompson This is my paper
classification quant-ph MSC 81P68 PACS 03.67.Lx
keywords quantumeconomicadvantageinteractivecalculatorcomputingroadmapsShor'salgorithmGrover'serrorcorrectionoverheadcost-equivalentcomparisonrobustnessanalysis
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

This paper's contribution is a public, interactive calculator that turns assumptions about quantum hardware—qubit counts, gate speeds, error-correction overhead, connectivity, and cost trends—into specific years when quantum computers will outperform equally priced classical computers for a given algorithm. The authors' headline finding is that the date for breaking RSA-2048 with Shor's algorithm is fairly robust: under current vendor roadmaps it lands around 2028–2034 across a wide range of parameter changes. In contrast, the date for Grover-style unstructured search is contingent: changing a single assumption by a factor of ten can move the predicted advantage by decades. The reason is structural—exponential speedups are limited mainly by qubit count, while quadratic speedups are limited by raw hardware speed. The tool matters because it lets researchers, policymakers, and business leaders compare different quantum-computing forecasts on a common basis and see which technical bet each prediction depends on.

What carries the argument

The central object is the QEA point, defined by the equation Feas(t) = Adv(t), where Feas(t) converts physical qubits into a maximum solvable problem size via the physical-to-logical qubit ratio, and Adv(t) is the smallest problem size n satisfying C(n, 10^p (1+CIR)^Δt) = 10^{hws} (1+QIR)^Δt × Q(n) × P(QPS^{-1}(n)). The calculator draws these lines dynamically from user-editable roadmaps and runtime expressions; the robustness contrast between Shor and Grover emerges from how fast each side of the equation moves as parameters change.

What would settle it

Recompute the paper's predictions with measured values for the cost-equivalent classical processor count and the annual improvement rates of quantum hardware slowdown, error-correction overhead, and relative cost. The paper's own sensitivity charts show factor-of-ten changes shifting Grover's date by decades while Shor's date barely moves; tracking actual vendor qubit counts against the extrapolated roadmaps would also falsify specific years such as the RSA-2048 dates.

Watch

Extended reading notes

Core claim

The calculator operationalizes quantum economic advantage (QEA) as the intersection of two curves: a feasibility line giving the largest problem size a vendor's qubit roadmap can handle after error-correction overhead, and an advantage line giving the smallest problem size at which a cost-equivalent classical machine is slower. It extends an earlier framework with three new inputs—classical parallelizability, a qubit-connectivity penalty, and a cost-improvement rate—and solves for the year t* where the curves cross. Applying the tool to Shor's algorithm and Grover's search on superconducting, trapped-ion, and neutral-atom roadmaps yields QEA years of 2025–2032, RSA-2048 break years of 2028–2

Load-bearing premise

The load-bearing premise is that a cost-equivalent classical machine has 10^8 processors and that quantum slowdown, physical-to-logical qubit ratio, and relative costs improve at the assumed annual rates (10%, 23%, 10%); those values are hand-set, not measured, and every predicted year is scaled by them.

Editorial extensions

If this is right

  • If the model is right, RSA-2048 becomes cryptographically vulnerable in the early-to-mid 2030s on at least one vendor roadmap, making migration of public-key infrastructure urgent.
  • For exponential-advantage algorithms such as Shor's, qubit count and the physical-to-logical qubit ratio are the levers that move advantage dates; speed and cost parameters matter little.
  • For quadratic-advantage algorithms such as Grover's, quantum gate speed and the cost of classical processors dominate; a machine with many slow qubits may never reach advantage for search-sized problems.
  • Because the calculator is open and parameterized, competing forecasts can be traced to the specific assumptions that produce them, making disagreements about quantum timelines inspectable.
  • The tool's 'no advantage by year 3000' output is a concrete consequence: under some parameter sets, certain problems will never become quantum-economically advantageous.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • The authors leave implicit that the hand-set values—10^8 cost-equivalent processors and 10% annual improvement rates—make the absolute years illustrative, not predictive; the transferable insight is the robustness ordering, not the calendar.
  • A testable extension is to run the same calculator on other polynomial-speedup algorithms such as quantum simulation or optimization heuristics: the model predicts they should behave like Grover, not Shor.
  • The connectivity penalty of √q can be calibrated empirically by compiling the same circuit for all-to-all and 2D architectures; if real overhead differs, QEA dates for different hardware types would need adjustment.
  • The paper's feasibility-limited versus speed-limited distinction suggests a hardware-roadmap principle: focus on qubit scaling for exponential speedups and on gate speed for polynomial speedups.
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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

3 major / 4 minor

Summary. The paper introduces an open-access web calculator that operationalizes the Choi-Moses-Thompson “Quantum Tortoise and Classical Hare” framework for quantum economic advantage (QEA). The tool takes as inputs algorithm runtimes, qubit roadmaps, error-correction ratios, hardware slowdowns, connectivity penalties, and improvement rates, and outputs the minimum advantage problem size n* and the year t* at which a given problem becomes both feasible and faster on quantum hardware. The authors analyze Shor factorization and Grover search on IBM, IonQ, and QuEra roadmaps, predicting QEA years and RSA-2048 break years (e.g., IBM 2034, IonQ 2033, QuEra 2028), and report a robustness analysis concluding that Shor-2048 predictions are more robust while Grover-based advantage is highly contingent on hardware speed and improvement assumptions.

Significance. If the implementation is faithful to its stated formulas, the calculator is a genuinely useful interactive instrument for comparative scenario analysis. Its strengths are transparency of the core equations, explicit modeling of parallelizability, connectivity penalties, and cost-equivalent processors, and a sensitivity analysis that exposes which parameters drive the predictions. The mathematical core is elementary and internally consistent. The qualitative contrast between Shor and Grover is, however, largely a formal consequence of the exponential-versus-quadratic speedup asymmetry in the runtime-equality equation, so the paper’s main analytic finding is more a property of the model than a new empirical discovery. Even so, making this structure visible to a broad audience is valuable. The central quantitative predictions are currently not reproducible from the stated inputs because of an undocumented factor of 100 in the hardware slowdown conversion, which is a load-bearing issue for Table III.

major comments (3)
  1. The hardware slowdown values in Table II are not derivable from the stated formula and default classical clock speed. With a 5 GHz classical clock (0.2 ns/operation), IBM's 12 ns 2-qubit gate gives a speed ratio of 60 (log10 ≈ 1.78), IonQ's 600,000 ns gate gives 3e6 (log10 ≈ 6.48), and QuEra's 250 ns gate gives 1250 (log10 ≈ 3.10). The reported slowdowns are 10^3.78, 10^8.48, and 10^5.1, each exactly 100 times larger. The text says these are 'converted using the formula from the inputs section,' but that formula does not include a 100x factor, and gate overhead is described separately as a user-input multiplicative factor. Because 10^hws enters the advantage condition Eq. (4) multiplicatively, all n* and t* values in Eqs. (5)-(6) scale with this missing factor; for Grover's quadratic speedup the implied shift in n* is quadratic in the slowdown, moving QEA years by decades. The paper must
  2. The qualitative robustness conclusion—Shor is feasibility-limited while Grover is speed-limited—is substantially entailed by the model before any parameter sweep. In Eq. (4), an exponential speedup makes n* depend logarithmically on 10^hws, whereas a quadratic speedup makes n* scale as (10^hws)^2. Thus the large sensitivity of Grover years to slowdown and the small sensitivity of Shor years to slowdown are formal consequences of the runtime-asymmetry structure, not emergent findings of the calculator. The paper should state this explicitly and reframe the result as a demonstration of the framework's analytic implications, rather than presenting it as an empirical discovery from the robustness plots.
  3. The specific year predictions in Table III rest on hand-set parameters—10^8 cost-equivalent processors, 10% QIR, 10% CIR, 23% RIR—whose values are acknowledged to be illustrative, with the processor count sourced to an unpublished working paper with overlapping authorship [35]. The paper's own robustness analysis (Figure 6) shows that factor-of-10 changes in these parameters shift Grover QEA years by decades. The limitations section acknowledges the rates are unknown, but the abstract and Table III present single-year predictions without this uncertainty. The manuscript should present Table III explicitly as a scenario-conditional output, not a point forecast, and should make the provenance of the 10^8 anchor auditable (e.g., by including the derivation in the paper or a supplement).
minor comments (4)
  1. The classical Shor/factoring runtime expression is typeset ambiguously as e(64/9 n)^{1/3}*(ln n)^{2/3}; the intended expression is exp((64/9)^{1/3} n^{1/3} (ln n)^{2/3}). Please correct the notation and state whether n refers to the integer to factor or its bit length, since the qubit-to-problem-size mapping depends on this.
  2. The sign convention for QIR, RIR, and CIR is confusing: the text says 'improvements are associated with negative values,' while Table II lists positive percentages with a note that the online tool uses negatives. The equations St+1 = St*(1+QIR/100) should be accompanied by an explicit statement that QIR is negative for improvement and by the domain of allowed values.
  3. The caps on hardware slowdown decay and the PLQR floor of 3 are mentioned in footnotes but are not represented in the equations in Section III-B. Please state these as piecewise constraints in the formal model so that the calculator's behavior is fully specified.
  4. The robustness figures are informative but their axes and the exact baseline value for each parameter are not described in the text. Adding a short caption or table listing the baseline values and the perturbation factors would make the sensitivity results reproducible by the reader.

Circularity Check

0 steps flagged · score 0.0 of 10

No circularity: the QEA calculator is a parameterized computation whose predictions follow from its stated equations and explicitly labeled assumptions.

full rationale

This paper is an implementation-and-extension paper, not a derivation of its framework from more basic principles. The QEA years in Table III are computed by solving the paper's stated equations (Adv(t)=Feas(t), Section III-B) from explicit inputs: classical/quantum runtimes, vendor roadmaps, PLQR, hardware slowdown, QIR, CIR, connectivity penalty, and processor count. None of these inputs is defined in terms of the output QEA years. The headline qualitative contrast (Shor robust, Grover contingent) is an analytic consequence of the asymptotic gap between exponential and quadratic speedups in the stated runtime-equality equation, and the paper itself explains this mechanism rather than treating it as an externally fitted result. The self-citations that are present ([3] framework by a co-author, [35] for the 10^8 processor assumption) supply modeling assumptions and parameter values, not theorems whose conclusions are presupposed. The paper explicitly labels trend rates and processor counts as 'reasonable and illustrative' and includes a sensitivity analysis (Section V-A) and limitations section acknowledging these unknowns. The apparent ~100x mismatch between the stated 5 GHz/12 ns speed-ratio formula and the reported 10^3.78 hardware slowdown is an arithmetic/reproducibility concern and possibly an unstated input assumption, but it is not a case of an output being equivalent to an input by construction, so it does not constitute circularity.

Assumptions & free parameters 8 free parameters · 7 assumptions · 0 invented entities

No new physical entities are introduced. The ledger is dominated by hand-set numerical parameters (improvement rates, processor count, PLQR bases, slowdown bases) and modeling axioms (runtime equalities, QPS classes, extrapolation rules) that the paper either cites to the prior CMT framework or chooses as 'reasonable and illustrative.' The most fragile items are the 10^8 processor anchor, the inconsistent 23%/yr PLQR improvement rate, and the unstated ~100x overhead factor in the slowdown conversion. The paper acknowledges the rates are unknown but does not flag the internal inconsistency or the hidden overhead factor.

free parameters (8)
  • Quantum Improvement Rate (QIR) = -10%/yr for all hardware
    Chosen as 'reasonable and illustrative' in Section IV-A; controls the annual decline of the 10^hws hardware slowdown in Adv(t) and directly shifts all QEA years.
  • Cost Improvement Rate (CIR) = -10%/yr for all hardware
    Chosen as 'reasonable and illustrative'; shrinks the number of cost-equivalent classical processors over time in Adv(t) and Adv_c(t), moving the classical baseline.
  • Physical-Logical Qubit Ratio Improvement Rate (RIR) = 23%/yr for all hardware
    Extrapolated from IBM PLQR 400 (2023) to 50 (2033), but 400*(0.77)^10 is about 29, not 50, so the stated rate does not reproduce the stated endpoints; imposed on vendors without their own data.
  • Baseline PLQR values = IBM 264, IonQ 32, QuEra 100
    Estimated values in Table II; the derivation of the IBM value from the cited 'around 400' 2023 figure is not shown.
  • Number of cost-equivalent classical processors = 10^8
    Set in Section IV-A from working paper [35] with overlapping authorship; it divides the fully parallelizable classical runtime and is the load-bearing anchor of the cost-equivalence comparison.
  • Hardware slowdown base values = IBM 10^3.78, IonQ 10^8.48, QuEra 10^5.1
    Computed from 2-qubit gate times, but the conversion embeds an unstated ~100x fault-tolerance/gate-overhead factor; a raw 12 ns gate against the 5 GHz clock is ~60x, not ~6000x.
  • Classical clock speed = 5 GHz
    Default assumption in Section III-A2; the paper argues it has minimal impact on outputs.
  • Connectivity penalty = sqrt(q) for IBM, 1 for IonQ and QuEra
    Default penalty for 2D-local routing overhead, based on [25]; user-customizable.
assumptions (7)
  • domain assumption QEA occurs at t where Feas(t) = Adv(t), with Feas from roadmap/PLQR/QPS and Adv from runtime equality C(n,10^p) = 10^hws * Q(n) * P(QPS^-1(n))
    The economic-advantage criterion is taken from the Choi-Moses-Thompson framework [3]; it equates advantage with runtime equality on price-equivalent machines (Sections II-A, III-B).
  • domain assumption Best-known worst-case runtimes: NFS e^((64/9 n)^(1/3) (ln n)^(2/3)) for factorization, n for search, n^2 ln n for Shor, sqrt(n) for Grover
    Standard complexity expressions cited to [26][28][30]; the NFS expression does not restate whether n is bits or digits.
  • domain assumption QPS function takes one of three forms: exponential (2^q), linear (q), or logarithmic (log2(q))
    Reduces qubit-to-problem-size mapping to three asymptotic classes (Section III-A1); Shor is linear, Grover exponential.
  • domain assumption Classical runtimes are fully parallelizable in the analysis; quantum parallelization is excluded
    Stated in Section IV: 'we will assume that the classical runtimes for each problem are fully parallelizable'; quantum parallelism is excluded with a coherence argument.
  • ad hoc to paper Hardware slowdown decay is capped and PLQR is floored at 3
    Two regulator caps stated in the footnotes of Section III-A2; the slowdown cap can bind for long-horizon Grover searches and the PLQR floor affects late-year feasibility.
  • ad hoc to paper Roadmap extrapolation is exponential beyond the last vendor data point by default
    Choice of extrapolation regime drives late-year feasibility; user-switchable to linear (Section III-A2).
  • ad hoc to paper An unstated ~100x gate-overhead factor is embedded in the gate-time-to-slowdown conversion
    The claimed slowdown values (e.g., IBM 10^3.78 from a 12 ns gate) do not follow from the speed ratio alone at a 5 GHz clock; a large multiplicative overhead is implicit (Section IV-A).

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Cite this review

Pith. "Pith review of Introducing the Quantum Economic Advantage Online Calculator." pith.science (2026). https://pith.science/paper/MPUXZMOK

@misc{pith2026250821031,
  author       = {Pith},
  title        = {Pith review of: Introducing the Quantum Economic Advantage Online Calculator},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/MPUXZMOK}},
  note         = {Machine review of arXiv:2508.21031}
}
read the original abstract

Developing a systematic view of where quantum computers will outperform classical ones is important for researchers, policy makers and business leaders. But developing such a view is challenging because quantum advantage analyses depend not only on algorithm properties, but also on a host of technical characteristics (error correction, gate speeds, etc.). Because various analyses make different assumptions about these technical characteristics, it can be challenging to make comparisons across them. In this paper, we introduce an open-access web-tool designed to make such comparisons easy. Built on the framework introduced by Choi, Moses, and Thompson (2023), it calculates when quantum systems will outperform classical computers for a given algorithmic problem. These estimates can be easily updated based on various assumptions for error correction, overhead, and connectivity. Different hardware roadmaps can also be used and algorithm running times can be customized to particular applications. It can currently be accessed at https://futuretech.mit.edu/quantum-economic-advantage-calculator. This integrated prediction tool also allows us to explore which technical factors are most important for quantum ``economic" advantage (outperforming on a cost-equivalent basis). Overall, we find that for some algorithms (e.g. Shor's) the timing of advantage is quite robust, whereas for others (e.g. Grover's) it is contingent, with numerous technical characteristics substantially impacting these dates. In the paper, we discuss both why this occurs and what we can learn from it.

Figures

Figures reproduced from arXiv: 2508.21031 by the authors.

Figure 1
Figure 1. User interface of the Quantum Economic Advantage Calculator. Users can adjust many parameters to fit their assumptions [PITH_FULL_IMAGE:figures/full_fig_p004_1.png] view at source ↗
Figure 2
Figure 2. Our QEA tool comes with preregistered roadmaps. User also have the ability to modify or customize their own quantum [PITH_FULL_IMAGE:figures/full_fig_p004_2.png] view at source ↗
Figure 3
Figure 3. Users can adjust hardware and algorithmic factors to [PITH_FULL_IMAGE:figures/full_fig_p005_3.png] view at source ↗
Figures from the paper (4 more)
Figure 4
Figure 4. Figure 4: Changing expressions for runtimes, work, and the [PITH_FULL_IMAGE:figures/full_fig_p007_4.png]
Figure 5
Figure 5. Figure 5: Projected Quantum Economic Advantage for Integer [PITH_FULL_IMAGE:figures/full_fig_p008_5.png]
Figure 6
Figure 6. Figure 6: Robustness studies for Grover’s algorithm using vendor roadmaps. The plot shows the year at which Grover’s algorithm [PITH_FULL_IMAGE:figures/full_fig_p010_6.png]
Figure 7
Figure 7. Figure 7: Robustness studies for Shor’s algorithm using vendor roadmaps. The year of advantage (ie, physically feasible and [PITH_FULL_IMAGE:figures/full_fig_p010_7.png]

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Pith tools

Reviewed August 5, 2026 · model on record in the stance chip above.