Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links
Paper Citation Record · LEDGER
SCE-NTT: A Hardware Accelerator for Number Theoretic Transform Using Superconductor Electronics
As of 31 July 2026, this Paper Citation Record lists 0 of 0 outbound references and 2 inbound Pith citation observations for arXiv:2508.21265.
A citation records a reference. It does not transfer a finding from one paper to another.
Coverage vector
One-hop event checks from named stored sources.
Source: scholarly_work_events, retraction_status_cache, observed 2026-07-31T06:34:12.847434+00:00
Pith citing papers itemized under the disclosed page cap.
Source: paper_references, paper_reference_links, observed 2026-07-30T13:30:50.758024Z
A source-named dated measurement, never combined with another source.
Source: arxiv_reference, observed 2026-05-11T07:50:59.930382Z
Reference resolution
0 of 0 outbound references displayed
- verified exact0
- verified fuzzy0
- unresolved0
- parse uncertain0
- malformed identifier0
- metadata mismatch0
External citation measurements
No source-named external measurement is stored.
Outbound references
No outbound reference observations are available for this paper version.
Pith citing papers
Observation 4b5b996f-bfc9-49e7-898f-4a0fe0ad13d8 · inbound
qPRO-AQFP: Post-Routing Optimization of AQFP Circuits with Delay Line Clocking cites this paper.
qPRO-AQFP: Post-Routing Optimization of AQFP Circuits with Delay Line Clocking SCE-NTT: A Hardware Accelerator for Number Theoretic Transform Using Superconductor Electronics
Reference 6
- Resolution
- verified exact
- arxiv_id, observed 2026-05-11T07:50:59.934840Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-07-31T06:34:12.847434+00:00.
Observation ab531316-afe5-4704-be22-195a04517205 · inbound
Bridging AQFP Technology Legalization and Physical Design: Layout-Aware Buffer and Splitter Insertion via Width--Depth Product Minimization cites this paper.
Bridging AQFP Technology Legalization and Physical Design: Layout-Aware Buffer and Splitter Insertion via Width--Depth Product Minimization SCE-NTT: A Hardware Accelerator for Number Theoretic Transform Using Superconductor Electronics
Reference 8
- Resolution
- unresolved
- no resolver link, observed 2026-07-30T13:30:50.758024Z
Source-reported events for the cited work
Unavailable: canonical work link unavailable.