Paper Citation Record · LEDGER

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits

As of 9 August 2026, this Paper Citation Record lists 35 of 35 outbound references and 0 inbound Pith citation observations for arXiv:2509.00071.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2509.00071 v1

Coverage vector

measured 35 of 35 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-08-05T16:00:39.668854Z

measured 35 of 35 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-09T06:31:02.800959+00:00

measured 0 of 0 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: cited_works

Reference resolution

35 of 35 outbound references displayed

verified exact1
verified fuzzy25
unresolved9
parse uncertain0
malformed identifier0
metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

Observation 0ef181c8-c919-41a1-8c88-3d794770e1a9 · outbound

This paper cites Betterv: Controlled ver- ilog generation with discriminative guidance,.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits Betterv: Controlled ver- ilog generation with discriminative guidance,

Reference 1

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T16:00:40.347494Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation ae77d113-0c46-4984-a415-d42f48f23723 · outbound

This paper cites LaMAGIC: Language-Model-based Topology Generation for Analog Integrated Circuits.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits LaMAGIC: Language-Model-based Topology Generation for Analog Integrated Circuits

Reference 2

Resolution: unresolved; no resolver link, observed 2026-08-05T16:00:39.431975Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 0fe74f83-553e-4f91-a8cb-5a962da28f51 · outbound

This paper cites RTLCoder: Outperforming GPT-3.5 in Design RTL Generation with Our Open-Source Dataset and Lightweight Solution.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits RTLCoder: Outperforming GPT-3.5 in Design RTL Generation with Our Open-Source Dataset and Lightweight Solution

Reference 3

Resolution: unresolved; no resolver link, observed 2026-08-05T16:00:39.439485Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 14faf72f-2e02-4397-8270-f8e060749dc7 · outbound

This paper cites Towards a comprehensive benchmark for high-level synthesis targeted to fpgas,.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits Towards a comprehensive benchmark for high-level synthesis targeted to fpgas,

Reference 4

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T16:00:40.330709Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation 9760aeff-2a44-46ab-a838-88a0f5a199b4 · outbound

This paper cites Masterrtl: A pre-synthesis ppa estimation framework for any rtl design,.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits Masterrtl: A pre-synthesis ppa estimation framework for any rtl design,

Reference 5

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T16:00:40.313817Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation 1ff4fb0f-0dbd-442c-afc8-9d66a4254aa3 · outbound

This paper cites SNS’s not a synthesizer: a deep- learning-based synthesis predictor,.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits SNS’s not a synthesizer: a deep- learning-based synthesis predictor,

Reference 6

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T16:00:40.298096Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation cedf928a-d6be-4251-ac9d-f162f64a546f · outbound

This paper cites Cross-modality program representation learning for electronic design au- tomation with high-level synthesis,.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits Cross-modality program representation learning for electronic design au- tomation with high-level synthesis,

Reference 7

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T16:00:40.282731Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation 5e7f51ac-9e36-4023-9b3b-63cd3fcbbe03 · outbound

This paper cites Versatile multi-stage graph neural network for circuit representation,.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits Versatile multi-stage graph neural network for circuit representation,

Reference 8

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T16:00:40.266962Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation 7d0a1017-5455-478f-a599-cddbac98af32 · outbound

This paper cites Circuitnet: An open-source dataset for machine learning in vlsi cad applications with improved domain-specific evaluation metric and learning strategies,.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits Circuitnet: An open-source dataset for machine learning in vlsi cad applications with improved domain-specific evaluation metric and learning strategies,

Reference 9

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T16:00:40.252000Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation 58c3593f-0b34-4b54-800a-92b3be2ce306 · outbound

This paper cites Circuit as set of points,.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits Circuit as set of points,

Reference 10

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T16:00:40.236257Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation 1e4c5555-9e10-488a-bba2-75f5fefb1525 · outbound

This paper cites Archexplorer: Microarchitecture exploration via bottleneck analysis,.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits Archexplorer: Microarchitecture exploration via bottleneck analysis,

Reference 11

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T16:00:40.217219Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation d143469e-9939-45cd-a7c8-cb0106342c88 · outbound

This paper cites Graph Generative Model for Benchmarking Graph Neural Networks.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits Graph Generative Model for Benchmarking Graph Neural Networks

Reference 12

Resolution: verified exact; local_arxiv, observed 2026-08-05T16:00:39.845347Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation 70ba4d8f-5755-4329-82b8-e19d1abf3301 · outbound

This paper cites A Survey of Circuit Foundation Model: Foundation AI Models for VLSI Circuit Design and EDA.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits A Survey of Circuit Foundation Model: Foundation AI Models for VLSI Circuit Design and EDA

Reference 13

Resolution: unresolved; no resolver link, observed 2026-08-05T16:00:39.535353Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 97218849-ced6-4458-bfa4-b4938c0be49b · outbound

This paper cites Efficient nonmyopic bayesian optimization via one-shot multi-step trees,.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits Efficient nonmyopic bayesian optimization via one-shot multi-step trees,

Reference 14

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T16:00:40.199661Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation 58f54235-e8d2-40d9-a3a8-0cd57585a478 · outbound

This paper cites D-vae: A variational autoencoder for directed acyclic graphs,.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits D-vae: A variational autoencoder for directed acyclic graphs,

Reference 15

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T16:00:40.182448Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation bc41f823-2652-48f8-b7c0-205fdef77318 · outbound

This paper cites Brp- nas: Prediction-based nas using gcns,.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits Brp- nas: Prediction-based nas using gcns,

Reference 16

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T16:00:40.165096Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation 765d8396-2be9-4758-b8ee-d9a19cbf9c86 · outbound

This paper cites Graphrnn: Gen- erating realistic graphs with deep auto-regressive models,.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits Graphrnn: Gen- erating realistic graphs with deep auto-regressive models,

Reference 17

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T16:00:40.148058Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation 033d49a3-8951-4774-9e97-e077c663aad7 · outbound

This paper cites Graphvae: Towards generation of small graphs using variational autoencoders,.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits Graphvae: Towards generation of small graphs using variational autoencoders,

Reference 18

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T16:00:40.128158Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation 8b7f7e2e-bbb8-4211-9082-f6c7c3a87292 · outbound

This paper cites Efficient graph generation with graph recurrent attention networks,.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits Efficient graph generation with graph recurrent attention networks,

Reference 19

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T16:00:40.110501Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation cde990a1-c98a-4b79-88af-f95c67073410 · outbound

This paper cites Efficient and Degree-Guided Graph Generation via Discrete Diffusion Modeling.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits Efficient and Degree-Guided Graph Generation via Discrete Diffusion Modeling

Reference 20

Resolution: unresolved; no resolver link, observed 2026-08-05T16:00:39.583025Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 5c3049f8-4a36-4625-8fa8-e0bf1ca36f20 · outbound

This paper cites Spectre: Spectral conditioning helps to overcome the expressivity limits of one- shot graph generators,.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits Spectre: Spectral conditioning helps to overcome the expressivity limits of one- shot graph generators,

Reference 21

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T16:00:40.087450Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation 5ad16549-b85d-439b-809e-201285405b4f · outbound

This paper cites DiGress: Discrete Denoising diffusion for graph generation.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits DiGress: Discrete Denoising diffusion for graph generation

Reference 22

Resolution: unresolved; no resolver link, observed 2026-08-05T16:00:39.595996Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation b6cb9055-4360-4683-814e-a67b8d806ed8 · outbound

This paper cites Layerdag: A layerwise autoregressive diffusion model of directed acyclic graphs for system,.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits Layerdag: A layerwise autoregressive diffusion model of directed acyclic graphs for system,

Reference 23

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T16:00:40.069797Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation 48cc53be-8b27-421d-87c7-f33ec176f687 · outbound

This paper cites Improved denoising diffusion probabilistic models,.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits Improved denoising diffusion probabilistic models,

Reference 24

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T16:00:40.052579Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation 6d26f501-2692-480c-9d44-326c2422480d · outbound

This paper cites GraphMaker: Can Diffusion Models Generate Large Attributed Graphs?.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits GraphMaker: Can Diffusion Models Generate Large Attributed Graphs?

Reference 25

Resolution: unresolved; no resolver link, observed 2026-08-05T16:00:39.613582Z

Source-reported events for the cited work

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Observation ff4939a4-885a-4684-bdb8-8a5e24ac531d · outbound

This paper cites Translating embeddings for modeling multi-relational data,.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits Translating embeddings for modeling multi-relational data,

Reference 26

Resolution: unresolved; no resolver link, observed 2026-08-05T16:00:39.618935Z

Source-reported events for the cited work

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Observation 9817e60d-8a5c-452a-80ea-1fe9fdd8d0fe · outbound

This paper cites A survey of monte carlo tree search methods,.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits A survey of monte carlo tree search methods,

Reference 27

Resolution: unresolved; no resolver link, observed 2026-08-05T16:00:39.624881Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 8580fb18-c5c9-4163-902a-08f5b85e65bf · outbound

This paper cites Annotating slack directly on your verilog: Fine-grained rtl timing evaluation for early optimization,.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits Annotating slack directly on your verilog: Fine-grained rtl timing evaluation for early optimization,

Reference 28

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T16:00:40.008727Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation 956ccf49-7ca6-4df8-b006-d11f3bebe03a · outbound

This paper cites Rt-level itc’99 benchmarks and first atpg results,.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits Rt-level itc’99 benchmarks and first atpg results,

Reference 29

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T16:00:39.990631Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation 9d359d67-1df5-4018-a6d4-61f41880d016 · outbound

This paper cites Iwls 2005 benchmarks,.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits Iwls 2005 benchmarks,

Reference 30

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T16:00:39.972230Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation 233437ef-cdf9-4f45-83e2-cf770a68515c · outbound

This paper cites Chipyard: Integrated design, simulation, and implementation framework for custom socs,.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits Chipyard: Integrated design, simulation, and implementation framework for custom socs,

Reference 31

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T16:00:39.954389Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation 6a1021e2-4849-4d70-a11a-75030ddeedd2 · outbound

This paper cites Sparse Training of Discrete Diffusion Models for Graph Generation.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits Sparse Training of Discrete Diffusion Models for Graph Generation

Reference 32

Resolution: unresolved; no resolver link, observed 2026-08-05T16:00:39.653336Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 7be911eb-735d-490b-aec1-0f3dbb83cfaf · outbound

This paper cites Gravity-inspired graph autoencoders for directed link prediction,.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits Gravity-inspired graph autoencoders for directed link prediction,

Reference 33

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T16:00:39.936655Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation 095a4af2-d24d-4340-a3ee-206a52b2de24 · outbound

This paper cites Large scale learning on non-homophilous graphs: New benchmarks and strong simple methods,.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits Large scale learning on non-homophilous graphs: New benchmarks and strong simple methods,

Reference 34

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T16:00:39.919865Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Observation 4159bf39-0d6e-457a-9670-3de64b53fc68 · outbound

This paper cites Complex networks: small-world, scale-free and beyond,.

SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits Complex networks: small-world, scale-free and beyond,

Reference 35

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T16:00:39.902972Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.

Pith citing papers

No inbound Pith citation observations are available.