Paper Citation Record · LEDGER

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions

As of 5 August 2026, this Paper Citation Record lists 44 of 44 outbound references and 0 inbound Pith citation observations for arXiv:2602.20802.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2602.20802 v3

Coverage vector

measured 44 of 44 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-08-02T21:18:43.828011Z

measured 44 of 44 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-05T06:32:48.257954+00:00

measured 0 of 0 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: cited_works

Reference resolution

44 of 44 outbound references displayed

verified exact0
verified fuzzy0
unresolved44
parse uncertain0
malformed identifier0
metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

Observation 0ffceb1b-c8ba-466a-ab3e-1a94f290bbbb · outbound

This paper cites Faster and stronger: Unleashing data processing potential through hardware heterogeneity,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Faster and stronger: Unleashing data processing potential through hardware heterogeneity,

Reference 1

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:39.268718Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation fa3f4786-c5f8-4210-b1ac-4e5da8bc0922 · outbound

This paper cites June 2020 List,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions June 2020 List,

Reference 2

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:39.380256Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation ca5a23eb-b297-4891-8aa0-8f98fb1187e6 · outbound

This paper cites June 2025 List,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions June 2025 List,

Reference 3

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:39.517250Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 9926ac15-237d-48ea-8441-e3bd51cf2cd5 · outbound

This paper cites Scalability analysis of avx-512 extensions,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Scalability analysis of avx-512 extensions,

Reference 4

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:39.641546Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 0df0751b-0784-474a-a7fd-7ee7eb4b87c0 · outbound

This paper cites An initial evaluation of arm’s scalable matrix extension,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions An initial evaluation of arm’s scalable matrix extension,

Reference 5

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:39.731317Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation bc6cb365-200e-4667-9e97-b3c4daf61b13 · outbound

This paper cites The world’s most valuable company just blew through an unprecedented milestone — CNN Business — edition.cnn.com,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions The world’s most valuable company just blew through an unprecedented milestone — CNN Business — edition.cnn.com,

Reference 6

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:39.901935Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 126f5bb9-da63-48e4-b380-a7e3c5aa1db4 · outbound

This paper cites Breaking the valuation deadlock: Replacing the p/e ratio with the potential payback period (ppp) for loss-making companies-a case study on intel (2025),.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Breaking the valuation deadlock: Replacing the p/e ratio with the potential payback period (ppp) for loss-making companies-a case study on intel (2025),

Reference 7

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:40.058210Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation a1d53a2b-fea6-4bdd-9c1d-bd5551254b52 · outbound

This paper cites Enabling Efficient GPU Communication over Multiple NICs with FuseLink,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Enabling Efficient GPU Communication over Multiple NICs with FuseLink,

Reference 8

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:40.137859Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 813e33ac-6d66-4f6e-bdce-5c1fdc747094 · outbound

This paper cites Bridging fpga and gpu over pcie: A low-latency communication path using avx- 512,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Bridging fpga and gpu over pcie: A low-latency communication path using avx- 512,

Reference 9

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:40.210338Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 26ef18f6-fef5-4527-82ec-bca6b82782fa · outbound

This paper cites Fast hbm access with fpgas: Analysis, architectures, and applications,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Fast hbm access with fpgas: Analysis, architectures, and applications,

Reference 10

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:40.262527Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 7bd5aa45-9a99-4595-8ee3-cdaf1a68dd9c · outbound

This paper cites Benchmarking and characterization of large language model inference on apple silicon,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Benchmarking and characterization of large language model inference on apple silicon,

Reference 11

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:40.327402Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 75e3527b-2315-47eb-951c-2f6614cf7f4d · outbound

This paper cites Performance analysis of gemm workloads on the amd versal platform,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Performance analysis of gemm workloads on the amd versal platform,

Reference 12

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:40.422955Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation db0c5b43-0c70-40c0-8ce7-e3abc59c99c6 · outbound

This paper cites Stitching fpga fabrics with fabulous and openlane 2,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Stitching fpga fabrics with fabulous and openlane 2,

Reference 13

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:40.520944Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 5c0d417c-a176-4671-8de4-6668b7d93e0a · outbound

This paper cites Fpga-extended general purpose com- puter architecture,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Fpga-extended general purpose com- puter architecture,

Reference 14

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:40.644446Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 024c7df7-3f0c-4512-8df4-09ca1585121e · outbound

This paper cites Versatile: Very fast partial reconfiguration controller,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Versatile: Very fast partial reconfiguration controller,

Reference 15

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:40.828960Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 8448e306-0da6-4368-9db4-d7eda7a83165 · outbound

This paper cites Looppoint: Checkpoint-driven sampled simulation for multi-threaded applications,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Looppoint: Checkpoint-driven sampled simulation for multi-threaded applications,

Reference 16

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:40.953873Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 7c16c125-1bef-45e5-8da5-b0c59435999a · outbound

This paper cites Unexpected Diversity: Quantita- tive Memory Analysis for Zynq UltraScale+ Systems,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Unexpected Diversity: Quantita- tive Memory Analysis for Zynq UltraScale+ Systems,

Reference 17

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:41.047688Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 3b780982-8b62-4611-877b-d1c14806f277 · outbound

This paper cites Using firesim to enable agile end-to-end risc-v computer architecture research,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Using firesim to enable agile end-to-end risc-v computer architecture research,

Reference 18

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:41.121007Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 273cf05c-8df7-47bd-ac91-d2af32f442b7 · outbound

This paper cites FlexBex: A RISC-V with a Reconfigurable Instruction Extension,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions FlexBex: A RISC-V with a Reconfigurable Instruction Extension,

Reference 19

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:41.245730Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 226d8716-b553-4a30-9da9-6efb88aa7a01 · outbound

This paper cites FABulous: an Embedded FPGA Framework,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions FABulous: an Embedded FPGA Framework,

Reference 20

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:41.335914Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation eb49c46b-2531-40a8-a4fb-021510aac995 · outbound

This paper cites A soft dual-processor system with a partially run-time reconfigurable shared 128-bit simd engine,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions A soft dual-processor system with a partially run-time reconfigurable shared 128-bit simd engine,

Reference 21

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:41.401425Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 71edc1a5-5b54-4b4e-b556-61a84ad7d1dc · outbound

This paper cites Disc: The dynamic instruction set computer,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Disc: The dynamic instruction set computer,

Reference 22

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:41.575071Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 5f415513-ba2b-4912-9171-6ca5cd405e56 · outbound

This paper cites Arnold: An efpga-augmented risc- v soc for flexible and low-power iot end nodes,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Arnold: An efpga-augmented risc- v soc for flexible and low-power iot end nodes,

Reference 23

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:41.700902Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation bdf65cdd-a06a-48f3-8d9e-2f1d4a398320 · outbound

This paper cites efpgas: Architectural explorations, system integration & a visionary industrial survey of programmable technologies,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions efpgas: Architectural explorations, system integration & a visionary industrial survey of programmable technologies,

Reference 24

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:41.840292Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 83124f21-55ca-431b-8ba4-da63f3f3bc0b · outbound

This paper cites The road not taken: efpga accelerators utilized for soc security auditing,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions The road not taken: efpga accelerators utilized for soc security auditing,

Reference 25

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:41.910581Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 68c11ee2-31d5-45a7-adbc-c79c7d4b7f39 · outbound

This paper cites Rispp: A run-time adaptive reconfigurable embedded processor,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Rispp: A run-time adaptive reconfigurable embedded processor,

Reference 26

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:42.003281Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 9df57042-3109-4404-b3f4-21dc82c34c9f · outbound

This paper cites efpga redaction,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions efpga redaction,

Reference 27

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:42.085838Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 6332cf74-d825-4970-81f4-13fa1ffe0058 · outbound

This paper cites Fpga dynamic and partial reconfiguration: A survey of architectures, methods, and applications,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Fpga dynamic and partial reconfiguration: A survey of architectures, methods, and applications,

Reference 28

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:42.194526Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation bdf758bb-68c6-4e7f-8d5a-313a1c6fad35 · outbound

This paper cites Fos: A modular fpga operating system for dynamic workloads,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Fos: A modular fpga operating system for dynamic workloads,

Reference 29

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:42.326403Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 731be1e7-66b2-44e5-897a-c99510f63902 · outbound

This paper cites AXI HWICAP v3.0 Product Guide (PG134),.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions AXI HWICAP v3.0 Product Guide (PG134),

Reference 30

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:42.489731Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation be5da109-0d41-4593-87b5-f75b6374d93f · outbound

This paper cites Intel intrinsics guide,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Intel intrinsics guide,

Reference 31

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:42.554005Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation a381610b-ddfd-49f5-ac3c-06a456468e37 · outbound

This paper cites Zuma: An open fpga overlay ar- chitecture,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Zuma: An open fpga overlay ar- chitecture,

Reference 32

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:42.682687Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation fc4b1131-3e8a-4e8f-998f-969ca6452bd1 · outbound

This paper cites Embedding fpga overlays into configurable systems-on-chip: Reconos meets zuma,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Embedding fpga overlays into configurable systems-on-chip: Reconos meets zuma,

Reference 33

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:42.747232Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 2a2f286b-2a0f-428d-95ac-226c57c8ee8a · outbound

This paper cites A survey of design and optimization for systolic array-based dnn accelerators,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions A survey of design and optimization for systolic array-based dnn accelerators,

Reference 34

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:42.806653Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 0467ccc3-339f-44f8-ad54-a97539ffc465 · outbound

This paper cites GitHub - htfab/rotfpga2,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions GitHub - htfab/rotfpga2,

Reference 35

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:42.937514Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation e149b54f-0015-4cf6-afe4-288511173e85 · outbound

This paper cites Overgen: Improving fpga usability through domain-specific overlay generation,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Overgen: Improving fpga usability through domain-specific overlay generation,

Reference 36

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:43.061888Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 541a7a28-d490-4f90-a5f6-3d1092cf85d7 · outbound

This paper cites Comparing fpga vs. custom cmos and the impact on processor microarchitecture,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Comparing fpga vs. custom cmos and the impact on processor microarchitecture,

Reference 37

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:43.191945Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 30759c52-7b79-44af-b8c3-403a76c2bfc4 · outbound

This paper cites Simodense: a RISC- V softcore optimised for exploring custom SIMD instructions,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Simodense: a RISC- V softcore optimised for exploring custom SIMD instructions,

Reference 38

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:43.307512Z

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Unavailable: canonical work link unavailable.

Observation 9c8b941e-5b12-4665-a226-9b601c02106e · outbound

This paper cites Vtr 9: Open-source cad for fabric and beyond fpga architecture exploration,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Vtr 9: Open-source cad for fabric and beyond fpga architecture exploration,

Reference 39

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:43.380749Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation f38ee6fe-a9b7-4c35-8a36-27e3450a0721 · outbound

This paper cites Making a case for an arm cortex-a9 cpu interlay replacing the neon simd unit,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Making a case for an arm cortex-a9 cpu interlay replacing the neon simd unit,

Reference 40

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:43.491567Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 6bee412d-c9e4-44ed-9eda-d37491884ca1 · outbound

This paper cites Stream: Sustainable memory bandwidth in high performance computers,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Stream: Sustainable memory bandwidth in high performance computers,

Reference 41

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:43.552805Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 09b0adc1-d1f5-4924-9c4e-4b911f76be95 · outbound

This paper cites Building openlane: A 130nm openroad- based tapeout- proven flow : Invited paper,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Building openlane: A 130nm openroad- based tapeout- proven flow : Invited paper,

Reference 42

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:43.635138Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 6a25f0c2-2b63-4d08-b3c3-3cae0efefd89 · outbound

This paper cites Asap7: A 7-nm finfet predictive process design kit,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions Asap7: A 7-nm finfet predictive process design kit,

Reference 43

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:43.761937Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 0ca1408d-63cb-4572-9830-1b111cf0bfd7 · outbound

This paper cites A distributed approach to silicon compilation: Invited,.

LUTstructions: Self-loading FPGA-based Reconfigurable Instructions A distributed approach to silicon compilation: Invited,

Reference 44

Resolution: unresolved; no resolver link, observed 2026-08-02T21:18:43.828011Z

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Unavailable: canonical work link unavailable.

Pith citing papers

No inbound Pith citation observations are available.